Who Watches the Watchers?

Subjecting your Design to an Audit Can be Painful and/or Enlightening

by Jim Turley

The German put out his hand. “Do you have ze papers?”

Of course I had my papers. I’d been planning this for weeks. My papers were all in order, I’d practiced my rudimentary German, and I’d anticipated every question he might ask me, along with my answers. Just act cool, I told myself. Confident, but not over-confident. Just give the man what he wants and he’ll let you go on your way.

This man stood between me and freedom. But there was something about his manner that told me he wasn’t going to let me past his desk without a struggle. This could get ugly.  Read More

Industry News

July 30, 2015

Altium Announces Major Update to TASKING Compiler for TriCore/AURIX Microcontrollers

QuickLogic Announces the EOS Platform, The World’s Most Advanced Sensor Processing SoC

Tektronix Releases MHL 3.0 Advanced Analysis and Compliance Test Solution

RTECC hosts Altera with two sessions on FPGA and Industrial Ethernet

New Evaluation Board from STMicroelectronics Simplifies NFC Deployment in Wearables, IoT, Smart Cities, and Other Emerging Applications

Accellera Systems Initiative Delivers UVM 1.2 to IEEE for Standardization

July 29, 2015

Synopsys Releases Latest Version of Coverity Software Testing Platform

High efficiency slim DIN Rail power supplies offer redundancy module option

Keysight Technologies Introduces PAM-4 Support on M8000 Series BER Test Solutions

Concept Engineering Presents Version 6 of Its Debugging Tools for Analog, Digital, AMS and SoC Designers

Icon Labs Releases Security Management System

Pentek Introduces FlexorSet Turn-key Signal Interface Solutions for Radar, Communications or Data Acquisition

TI drives toward a one-cable world with the first integrated USB Type-C Power Delivery controller in volume production

New Cloud-based Solution from Anritsu Reduces Costs and Improves ROI of In-building DAS Installation and Maintenance

New 1GHz oscilloscope with unparalleled analysis and debugging capabilities

Synopsys Achieves Certification from Multiple Standards Organizations for Portfolio of IP on TSMC 16-nm FinFET Plus Process

July 28, 2015

Advanced Semiconductor Technology from STMicroelectronics Underlies Tomorrow’s Mobile Network Infrastructures

TEWS TECHNOLOGIES Introduces XMC Module Family with User-Programmable FPGA

Fairview Microwave Debuts a Complete Family of High Reliability RF & Microwave Power Amplifiers

Synopsys Announces Industry's First USB Type-C IP Solutions

Wind River Drives IoT Device Development with Real-Time Virtualization Offering

Avnet Electronics Marketing Leverages Open Source Prototyping Platform in New MicroZed Carrier Card Kit for Arduino

July 27, 2015

New FPGA Mezzanine Card (FMC) products in compliance with the VITA 57 standard

Spectrum publishes a free Digitizer Handbook

Plessey expands dotLED product range for wearables CSP versions available in September 2015

UCLA researchers create smartphone-based device that reads medical diagnostic tests quickly and accurately

UltraSoC partners with Tortuga Pacific to advance global SoC debug and analytics market

42V Quad Synchronous Step-Down DC/DC Converter Delivers 93% Efficiency & Operates from 3V to 42V Inputs

News Archive

Making SoCs Easier to Debug

A New Technology Aims to Track Both Software and Hardware Bugs

by Dick Selwood


Proving You’re Legit – to Yourself and Others

by Bryon Moyer

The Zen of Verification and IoT Maintenance

Finding a Holistic Way to Verify Your IoT

by Amelia Dalton

Summertime Beach Reading

Being a Collection of Midsummer News Bits for Nerds

by Jim Turley

Articles Archive


Featured Video

editors' blog

QuickLogic Goes Full SoC for Sensors

posted by Bryon Moyer

QuickLogic has announced a new device that builds on ArcticLink, intended to act as the always-on manager for phones and wearables. (Today)

CogniVue Drives at Mobileye

posted by Bryon Moyer

Mobileye is far and away the leader in ADAS vision processing. CogniVue has announced a roadmap to change that. (28-Jul)

Cadence Refreshes Synthesis and Formal

posted by Bryon Moyer

Cadence has recently announced new versions of their synthesis tools and the integration of recently acquired Jasper technology into the fold. (23-Jul)

Motion for User Interfaces

posted by Bryon Moyer

Quantum Interface announces their Qi technology. It may look like just more gesture recognition, but it isn’t. (9-Jul)

Auto-Updating Autos

posted by Bryon Moyer

Movimento makes it easier to update all of the software bits in newer cars. (7-Jul)

Editors' Blog Archive




Posted on 07/29/15 at 2:02 PM by RyanKenny

An important aspect of the picture you draw here is that it is multi-party: chip vendor, processor IP provider, OS/RTOS provider, hypervisor provider, stack source (open?), and applications.

I won't comment if Benjamin Franklin's quote about secrets an…


Posted on 07/27/15 at 2:30 PM by TotallyLost

And the TEE needs to be completely transparent -- From tool chain that compiles it, source codes for everything (tool chain, libraries, and product), and the verifiable binaries that are produced.

Trust starts with the transparency that anyone, especia…


Posted on 07/27/15 at 10:55 AM by bmoyer

How does your security setup establish trust, especially if it's a small device?

The Zen of Verification and IoT Maintenance

Posted on 07/24/15 at 11:48 AM by Lord Loh.

Lord Loh.
Hi Amelia,

I want to enter the contest to win the super cool, amazing Odyssey MAX 10 BLE Kit. smiling

Engineering Agility

Posted on 07/22/15 at 6:25 PM by rcousins

Kevin - couldn't agree more! And with the price of ARM-based SoCs falling like a rock, the day of shipping high-volume products with features that have yet to be conceived of on delivery day is fast approaching... It's one of the big reasons we went with …

“The Wave” Goes Micro

Posted on 07/21/15 at 9:11 AM by bmoyer

Do you see spin wave circuits in your future?

Trippin' The Odyssey Fantastic

Posted on 07/17/15 at 3:53 PM by Lord Loh.

Lord Loh.
Hi Amelia smiling,

I want to enter the super cool contest smiling

- Bharath.

Engineering Agility

Posted on 07/17/15 at 4:27 AM by atanasov

Dear Kevin, your great article reminds me of a funny experience that I had:

In 2010, I had to develop an FPGA-based solution for an industrial application for my employer.
Prototypes in another part of the building.
Other test machines at other compa…

Engineering Agility

Posted on 07/16/15 at 5:28 PM by TotallyLost

Glad to hear such important design goals on the EE side the product specification role

Thinking that products will be obsolete in a year, or three, is really giving your customers a choice for a competitive purchasing option, to jump ship, and you loo…

Forum Archive

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Featured Chalk Talk

On Demand Archive

chalk talks

The Vault

Professional engineering projects require professional working practices. When we're designing things to be manufactured in volume, it's critical that we keep track of versions and revisions, collaborate and communicate effectively, and hand-off the right materials to manufacturing. In this episode of Chalk Talk, Amelia Dalton chats with Sam Sattel of Altium about Altium's "Vault" - which makes those professional practices a whole lot easier and smoother.

Vivado In-System Debug

Today's complex FPGA designs can be challenging to debug. If you're debugging in hardware, you need both visibility and control of what's going on inside your chip. In this episode of Chalk Talk, Amelia Dalton talks to Ron Plyler of Xilinx about doing hardware debug in Xilinx's Vivado tool suite.

Product-Centric Design with Virtual Prototyping

As engineers, it's easy to get the feeling that your PCB is the center of the design universe. But, it's important to remember that we are designing products, not just boards, and a product-centric design methodology is essential to creating the competitive products that customers demand. Product level virtual prototyping validates that your detailed design approach can support the product requirements. In this episode of Chalk Talk, Amelia Dalton and Bob Potock explore the concept of product-centric design with virtual prototyping and highlight how it differs from traditional, PCB-centric design.

i.MX 6SoloX – Freescale’s New Heterogeneous Multicore Applications Processor

Many applications today need both an applications processor AND a real-time MCU. But, most solutions don't offer both on the same chip. In this episode of Chalk Talk, Amelia Dalton chats with Amanda McGregor of Freescale about a new application processor that combines an ARM Cortex-A9 core with the efficiency and real-time capability of the Cortex-M4.

10 Secrets to Getting a Lower BOM Cost

Reducing your BOM costs can be a complex challenge. If your design includes programmable logic, you have a lot of powerful options for reducing cost that might not be obvious simply by looking at component costs. In this episode of Chalk Talk, Amelia Dalton chats with Maureen Smerdon and Darren Zacher of Xilinx about minimizing BOM costs in your next design.

Abstract and Conquer: A New Alternative to Hierarchical Timing Analysis

Sign-off timing analysis for today’s complex SoC designs can be daunting. Rather than just throwing more computer power at the problem, you need to adopt a hierarchical approach and take advantage of higher levels of abstraction. In this episode of Chalk Talk, Amelia Dalton talks with Ruben Molina of Cadence Design Systems about a new, faster approach to sign-off timing analysis.

4-Channel Analog Front End Solution

Designing the analog front end for any project can be a time-consuming engineering task. And, without a lot of analog expertise, many of us will face some tricky engineering challenges. In this episode of Chalk Talk, Amelia Dalton chats with Bill Laumeister of Maxim Integrated about a new analog front end (AFE) that both simplifies and improves the design of many analog front ends.

Chalk Talk Archive

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