Over the FR4 and Through the Woods

To Grandma's PCB We Go

by Amelia Dalton

This week’s Fish Fry is all about your next PCB design. From power integrity to mixed-signal place and route, from Gerber files to schematics, from output pins over the FR4 and through the vias, to grandma’s house we go. My first guest this week is Greg Lebsack from Tanner EDA, and we discuss why you want a digital place and route tool, integrating ye ol’ analog into your next design, and what Tanner EDA brings to the mixed-signal party. Next up, we bring in Hemant Shah from Cadence Design Systems to chat about one of the biggest pain points of PCB design: the hand off to manufacturing. Hemant and I investigate a rapidly expanding industry consortium that is hoping to change all of that awful file hand off once and for all.  Read More

Industry News

November 19, 2014

Elliptic Technologies Unveils Future-Proof Secure Hardware Root of Trust Technology for IoT Applications

ZigBee 3.0 Creates Single Open, Global Wireless Standard for Devices

Synopsys Expands IP Accelerated Initiative with New DesignWare IP Prototyping Kits for 10 Interface Protocols

Over 15,000 Microsemi Space Products Deployed on 10-year-long Rosetta Spacecraft Mission

Holst Centre, imec and CARTAMUNDI Join forces to Create the Near Field Communication Chip of the Future

November 18, 2014

Rockchip Debuts Intel Jointly-Developed Game-Changing 3G Processor for Android Devices

ams schedules 2015 multi-project wafer starts for analog foundry customers

Renesas Electronics Delivers Productivity Boost in Industrial Applications with the RZ/T1 Real-Time Processor Solution

AVX Releases New SMPS Capacitor Simulation Software

Xilinx Demonstrates All Programmable Solutions for Industrial Automation Applications at SPS/IPC/Drives 2014

IAR Systems reveals support for RZ/T1 factory automation network solution from Renesas Electronics

MegaChips Joins Imec and Holst Centre’s R&D program on Ultra-low Power Radio

STMicroelectronics Supports Drive for Inverters in Smaller Boxes Everywhere, from PHEV Battery Chargers to Solar Generators

Oticon Standardizes on Synopsys' Design Compiler Graphical

7-GHz ADC drivers bring AC performance to DC-coupled applications

Buck Converters from Diodes Incorporated Enable Smarter Power Regulation

November 17, 2014

New Dual Wideband Transceiver from VadaTech in FMC Format

Nallatech Collaborates with OpenPOWER Foundation Members IBM and Altera to Launch Innovative CAPI FPGA Accelerator Platform

Xilinx Announces SDAccel Development Environment for OpenCL, C, and C++, Delivering Up to 25X Better Performance/Watt to the Data Center

Nallatech to Demonstrate FPGA Acceleration at SC14

Altera and IBM Unveil FPGA-accelerated POWER Systems with Coherent Shared Memory

Synopsys' IC Validator Adopted by Plastic Logic for Physical Verification of Advanced Displays

November 14, 2014

Get Powered Up with the Updated Mouser Solar Power Technology Site

Spansion Launches Industrial-grade e.MMC Memory for Consumer, Communication and Industrial Embedded Systems

Pasternack Introduces New Lines of Digitally Programmable Attenuators

Imec and Holst Centre Report Breakthrough in Qualitative and Reliable EEG Monitoring Systems for Home Monitoring

mCube Named MEMS Start-Up of the Year at MEMS Executive Congress; Wins Technology Showcase Competition with its Software Gyro

Xilinx and its Ecosystem Showcase Compute, Storage, and Networking Acceleration for Data Center and HPC Applications at SC14

News Archive

A Sale of Thirty-Two Bitties

AMD’s Multi-pronged Strategy Is Certainly Different, But Is It Better?

by Jim Turley

FPGAs Cool Off the Datacenter

Xilinx Heats Up the Race

by Kevin Morris

Managing Encryption

HCC Embedded Strikes Efficiency/Freedom Balance

by Bryon Moyer

Paging Dr. MEMS

Merit Systems and MEMS in the Medical Machine

by Amelia Dalton

Articles Archive


EEJournal On The Scene Video News
 Hosted by Amelia Dalton

editors' blog

Two Weeks of MEMS and Sensors

posted by Bryon Moyer

Between the MEMS Executive Congress and TSensors, you could be forgiven for thinking that sensors is all there is. (20-Nov)

Wireless Power: Making Actual Product

posted by Bryon Moyer

I chatted with PowerSquare about what wireless technology they’re using for their new charging products. It wasn’t what I expected. (18-Nov)

A Dev Board with Both Touch and Gestures

posted by Bryon Moyer

A Dev Board with Both Touch and Gestures Microchip’s 3D Touchpad is enveloped in a development environment for creating interfaces and drivers. (13-Nov)

Express Logic’s X-Ware Platform

posted by Bryon Moyer

This platform provides a middleware bundle for Things (or other embedded systems). (11-Nov)

If This Is a Conference, then It Must Be November

posted by Bryon Moyer

A quick look at some of the events I’ll be attending over the next few weeks. (24-Oct)

Editors' Blog Archive



A Sale of Thirty-Two Bitties

Posted on 11/19/14 at 3:08 PM by WEATHERBEE

My suggestion: Dump the uncompetitive x86 and commodity ARM plans and focus on GPGPU and high-performance computing.

A Sale of Thirty-Two Bitties

Posted on 11/19/14 at 2:09 PM by TotallyLost

I've done a couple server designs around Intel Xeon products, and while general documentation is easy to access with NDA, unless there are serious sales numbers behind the design, it's difficult to get additional support or docs.

AMD has been even a bi…

Build Your Own RTOS in 30 Minutes

Posted on 11/19/14 at 12:41 PM by ericverhulst

Just from SynthOS website:
- "Interrupts are supported. System used forced cooperation for multitasking rather than pre-emption."
Then look at the figures for interrupt latency, context switch time, etc.
=> pretty slow compared to any other embedded RT…

Managing Encryption

Posted on 11/17/14 at 10:33 AM by bmoyer

Does HCC Embedded's way of managing encryption strike the right balance between centralization and flexibility?

Build Your Own RTOS in 30 Minutes

Posted on 11/17/14 at 6:35 AM by Rutan65

Well, I don't consider Linux a real real-time OS. Does SynthOS generate a pre-emptive OS?
What about interrupt latency in terms of something like "number of instructions"?
Task switching time is also an important parameter. Can you supply some numbers o…

EUV’s Second Source

Posted on 11/10/14 at 10:25 AM by bmoyer

What do you think about Adlyte's actinic inspection readiness? Are we good to go?

Apple and Serious Security: NOT an Oxymoron

Posted on 11/08/14 at 11:10 AM by kleinman


Spot-on #1: security is almost always a trade-off. Let's consider Apple Pay as it exists (as opposed to my concoction). Even though setting up Apple Pay is relatively easy, many people will never go through the steps to activate it. And others w…

Apple and Serious Security: NOT an Oxymoron

Posted on 11/07/14 at 1:45 PM by RyanKenny

'Apple Security' may not be an oxymoron, but you may have accidentally penned another one: 'useful security feature'. Security is usually a trade-off against utility/efficiency, and the effectiveness of a security feature is judged by history. If you are …

Apple and Serious Security: NOT an Oxymoron

Posted on 11/07/14 at 10:41 AM by kleinman

You cannot "copy" a private key "out of" the secure element. NFC chips have never been breached, to my knowledge.
I agree completely!

I am describing a mechanism for backing up the private key: first encrypt it (with a separate passph…

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On Demand Archive

 Watch Chalk Talks
 On our New EE Journal YouTube Channel
 Hosted by Amelia Dalton

chalk talks

Digital Predistortion for Base Station Power Amplifiers

In this episode of our new Chalk TalkHD series, Amelia Dalton talks to Todd Nelson from Linear Technology about how digital predistortion (DPD) can be used to save millions of dollars worth of power in base station designs. DPD is simple to apply, and has a dramatic impact on the power amplifier - the most power-hungry part of modern base stations. In this Chalk TalkHD you'll hear how DPD works and how you can apply it to your next design.

Getting Started Using Kintex-7 FPGAs for DSP

In this episode of Chalk TalkHD Amelia chats with Tom Hill of Xilinx about their new Kintex-7 DSP development kits that will finally get you onto the rocket-coaster of FPGA-powered DSP.

It's the Software, Silly! - Success with FPGA-based Prototyping

Software is becoming a larger and larger part of our system-on-chip (SoC) designs. It is critical that we be able to begin developing and debugging software as early as possible in the design cycle. But, the hardware part of today's complex designs takes months to stabilize. In this episode of Chalk Talk, Amelia Dalton talks with Juergen Jaeger of Cadence about the tight relationship between software and emulation and how you can achieve success in your SoC design with a comprehensive emulation strategy.

Power Supply Management in High-Availability Systems

One of the most basic (and most often overlooked) aspects of high-reliability system design is getting reliable power to all of our components. We need the right kind of power at the right places - at the right times, and in the right order. We need to handle power-up, power-down, and reset cases (among others). It can be really complicated. In this episode of Chalk TalkHD Amelia Dalton chats with Wendy Lockhart of Microsemi about how to handle power management for high-reliability systems.

100G Ethernet Packet Parsing with Spacetime

Designing 100G Ethernet is a daunting challenge. Timing, power, latency, and throughput all fight with each other, and it's easy to fall into a design trap with a solution that doesn't offer a good compromise. In this episode of Chalk Talk, Amelia Dalton chats with Parsun Raha about the challenges of 100G (and beyond), and how those conflicting design goals can be met by Tabula's innovative Spacetime architecture.

What is Design Security in a Mainstream SoC?

Do you worry about security in your FPGA design? Are there bad guys out there trying to take advantage of security holes in your electronic designs? What can we do to stop them? In this episode of Chalk Talk, Amelia chats with Tim Morin (Microsemi) about the practical aspects of security in mainstream SoC FPGAs - what threats are out there and what we can all do to help keep the bad guys at bay.

Vivado In-System Debug

Today's complex FPGA designs can be challenging to debug. If you're debugging in hardware, you need both visibility and control of what's going on inside your chip. In this episode of Chalk Talk, Amelia Dalton talks to Ron Plyler of Xilinx about doing hardware debug in Xilinx's Vivado tool suite.

Chalk Talk Archive

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