Fish Fry – EEJournal

December 6, 2019

Did you know that over a hundred devices are connected to the internet every second? In this week’s episode of Fish Fry, we take a closer look at the challenges facing us as we develop the next generation of connected devices. Tom Doyle (CEO – Aspinity) joins me to discuss the details of Aspinity’s innovative RAMP (Reconfigurable Analog Modular Processor) platform, the “deal breakers” as he sees them when it comes to IoT designs, and why the answer to our always-on, always-sensing power challenges is architectural. Also this week, we check out Kickstarter’s Make 100 campaign and a … Read More → "All of the Information: The Good, The Bad, and The Ugly"

Your RTOS or Mine?

Percepio, Tracealyzer, and Monitoring Embedded Software at Runtime

by Amelia Dalton

November 22, 2019

Are you ready to RTOS? Because I am! In this episode of Fish Fry, Mike Skrtic (Percepio) and I discuss RTOS fundamentals, advanced RTOS Techniques, and how you can get a little help with your next RTOS debugging project. Also this week, we check out some cool (and creepy?) new artificial skin technology called “Skin-On” that could make skin-on-skin interactions with our gadgets a reality.

… Read More → "Your RTOS or Mine?"

So Many Verification Cycles, So Little Time

by Amelia Dalton

November 15, 2019

Are you ready for an EDA smorgasbord? In this week’s episode of Fish Fry, we are laying out virtual buffet of emulation, hardware assisted development, enterprise prototyping, and parser platforms for your friday podcasting pleasure. First up, Frank Schirrmeister (Cadence Design Systems) joins us to dish about our growing thirst for verification, the benefits of FPGA based prototyping and why hardware-assisted development is more and more important these days. Also this week, Michiel Ligthart (President and COO – Verific) and I chat about the role of parsers in the EE community and why Verific chose a giraffe to be … Read More → "So Many Verification Cycles, So Little Time"

Driving Optimization

HLS, FPGAs, and Converting Unsynthesizable Code with Silexica

by Amelia Dalton

November 8, 2019

What do high level synthesis, FPGAs, and the first 3D printer capable of printing fully-functional electronics have in common? This week’s podcast, of course! First up, I chat with Max Odendahl (CEO, Founder – Silexica) about ins and outs of system level understanding and optimization, what we can do with unsynthesizable C/C++ code and how we can tackle the biggest challenges in using Software (C/C++) for hardware design. Also this week, we check out a new Kickstarter campaign called eForge that hopes to make 3D printed electronics an everyday reality.

… Read More → "Driving Optimization"

Plotting a Course to Functional Safety

Accelera’s Roadmap for Design Automation and Tool Interoperability

by Amelia Dalton

November 1, 2019

There are many roads to prosperity, but one must be taken. Inaction leads nowhere. – Robert Zoellick

Security is not implemented overnight. Standards don’t create themselves. And our design lives won’t get easier if security and standards aren’t addressed at every step of the game. In this week’s podcast, Brent Sherman (Intel), Adam Sherer (Cadence) and I chat about the challenges of security characterization within IP implementation and delivery in a functional safety flow and why Accelera is looking to EE design community help them steer a path steer forward to comprehensive … Read More → "Plotting a Course to Functional Safety"

Everything You Always Wanted to Know About SI* (*But Were Afraid to Ask)

Eric Bogatin Explains Why Good Signal Integrity Habits Make Better Boards

by Amelia Dalton

October 25, 2019

The Man, The Myth, The Legend of Everything SI – the one and only Dean of the Teledyne LeCroy Signal Integrity Academy Eric Bogatin joins Fish Fry this week. I had the pleasure of sitting down with Eric at this year’s AltiumLive and we talked about a wide variety of signal and power integrity issues including the downsides of open source designs, what signal integrity noise and rogue waves have in common, and why designing return paths is like a scene in the movie GhostBusters.

Pixelated Perfection

Pixelworks Puts in the Big Screen In Your Pocket

by Amelia Dalton

October 18, 2019

What makes your pocket-sized screen picture perfect? There is a good chance Pixelworks has something to do with it. In this week’s podcast, Peter Carson (Pixelworks) and I dig into the details of innovative Pixelworks’ image processing platform and why the preservation of artistic intent is cornerstone to the Pixelworks vision. Also this week, we take a closer look at a new neural network training technique called deep reinforcement learning developed at Pittsburgh’s Carnegie Mellon University that could turn drones into self-directed aerial cinematographers.

… Read More → "Pixelated Perfection"

It’s ALive!

AltiumLive 2019: Making, Engineering, and the Imagination in Between

by Amelia Dalton

October 11, 2019

Coming to you from AltiumLive 2019, this week’s podcast is all about hacking, PCB design, and how sharing information can inspire innovation big and small. AltiumLive 2019 keynote speaker Joe Grand (Grand Idea Studio/L0pht Heavy Industries) and I discuss how hacking and engineering can collide in today’s EE ecosystem. We also discuss the origins of the legendary hacking group L0pht Heavy Industries and Joe shares a couple of his favorite hacking creations. In our second interview this week, Altium keynote speaker Robert Feranec (Founder – FEDEVEL Academy) and I chat about the challenges of hardware design process … Read More → "It’s ALive!"

Get Smart(er)!

Reinventing Analog IP, Edge Native Infrastructure, and Making Our Smart Systems Even Smarter

by Amelia Dalton

September 27, 2019

Work smart. Get things done. – Susan Wojcicki

What’s smarter than smart? This week’s episode of Amelia’s Weekly Fish Fry! Tim Ramsdale (CEO – Agile Analog) reveals how Agile Analog is changing the landscape of analog IP and why their unique design methodology sets their analog IP away from the rest of the pack. In our second interview this week, Tom Yates (Product VP – Nubix.io) joins us to discuss the current state of edge computing and how is Nubix.io helping embedded designers get the most out of their IoT and edge-based designs.</ … Read More → "Get Smart(er)!"

The Acceleration Situation

CacheQ, Accelerated Computing at Scale, and Flying Whale Robot Drug Delivery

by Amelia Dalton

September 20, 2019

In this week’s episode of Fish Fry, Clay Johnson (CEO – CacheQ) joins us to discuss the history of processor performance demands and why today’s designs require a variety of different technologies to increase compute performance. Clay and I also chat about the details of their QCC platform and how their platform is helping software developers leverage the benefits of heterogeneous distributed compute environments. Also this week, we investigate the details of a new whale-shaped nanorobot specifically designed for drug delivery by Dartmouth College and City University of Hong Kong.

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