This week’s podcast is one part frog embryo, one part embedded design, and one part crystal ball! To start things off, we take a closer look at how a team of research scientists have created a new form of life (a living, programmable organism called a Xenobot) with a little help from African frog embryos, an algorithm that simulates designs for new life-forms, and the Deep Green supercomputer … Read More → "New Kid on the Block"
We’ve looked at a number of architectures for accelerating neural-network inference calculations before. As an example, those we saw from Hot Chips were big, beefy processing units best targeted at cloud-based inference. But, as we’ve mentioned, there is lots of energy going … Read More → "Graph-Based AI Accelerators"
“I’d love to be incredibly wealthy for no reason at all.” – Johnny Rotten
Among sports car aficionados, a “Super Seven” is a 1960s-era Lotus: light, fast, nimble, and characteristically fragile. Marvel superhero Wolverine drives one; the unnamed protagonist in The Prisoner famously had one, too.< … Read More → "Nuvia: Designed for the One Percenters"
The upshot: Mindtech provides a capability for creating fully annotated synthetic training images to complement real images for improved AI training.
We’ve spent a lot of time looking at AI training and AI inference and the architectures and processes used for each of those. Where the AI task involves images, we’ve blithely referred to the need … Read More → "Synthetic Images for AI Training"
The upshot: Memories can be arranged such that an “access” becomes a multiply-accumulate function. Storing weights in the memory and using activations as inputs saves data movement and power. And there are multiple ways to do this using RRAM, flash, and SRAM – and then there’s an approach involving DRAM, but it’s completely different.
In the scramble … Read More → "In-Memory Computing"
In part 1 of this series, we looked at new high-end FPGA families from Xilinx, Intel, and Achronix and discussed their underlying semiconductor processes, the type and amount of programmable logic LUT fabric, the type and amount of DSP/arithmetic resources and their applicability to AI inference acceleration tasks, the claimed TOPS/FLOPS performance capabilities, and on-chip interconnect … Read More → "High-End FPGA Showdown – Part 3"