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NASA Recruits Microchip, SiFive, and RISC-V to Develop 12-Core Processor SoC for Autonomous Space Missions

NASA’s JPL (Jet Propulsion Lab) has selected Microchip to design and manufacture the multi-core High Performance Spaceflight Computer (HPSC) microprocessor SoC based on eight RISC-V X280 cores from SiFive with vector-processing instruction extensions organized into two clusters, with four additional RISC-V cores added for general-purpose computing. The project’s operational goal is to develop “flight computing technology that will provide at least 100 times the computational … Read More → "NASA Recruits Microchip, SiFive, and RISC-V to Develop 12-Core Processor SoC for Autonomous Space Missions"

MIPS Rolls Out Its First RISC-V Processor Core – It’s a Big ‘Un

Even though the company had telegraphed its big move, MIPS’s adoption of the RISC-V ISA for its future processor cores hit me like a ton of bricks. MIPS is one of the heroes of the early RISC revolution, and the company has gone through a lot of ups and downs. Big ups. Big downs. Jim Turley discussed the MIPS announcement about joining the RISC-V gang … Read More → "MIPS Rolls Out Its First RISC-V Processor Core – It’s a Big ‘Un"

Does 2+2=4? Microchip announces PolarFire 2; You Do the Math

Microchip previewed its PolarFire 2 mid-range SoC FPGA family at the RISC-V Summit last month in two presentations including a keynote given by Bruce Weyer, the company’s Corporate VP for FPGAs. Although the company provided very few product details, it dropped many hints. So many hints, in fact, that I can give you the information I’ve collected based on these hints, tell you what I … Read More → "Does 2+2=4? Microchip announces PolarFire 2; You Do the Math"

A History of Early Microcontrollers, Part 7: The Zilog Z8

When Federico Faggin arrived at Intel in 1970, he immediately discovered that he’d stepped into a royal mess. He’d left Fairchild Semiconductor and accepted the position at Intel before being fully briefed on the custom chip set project for Busicom that would eventually become the first commercially successful microprocessor, the 4004. Faggin had developed a silicon-gate MOS process technology at Fairchild, knew it was vastly superior … Read More → "A History of Early Microcontrollers, Part 7: The Zilog Z8"

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featured blogs
Jan 31, 2023
At CadenceLIVE Europe last year, Ludwig Nordstrom of AWS presented Scaling to 1 Million+ Core to Reduce Time to Results, with up to 90% Discount on Compute Costs . I think that there are currently two trends in EDA infrastructure that cut across almost all design tools. They ...
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chalk talks
Introduction to Bare Metal AVR Programming — Microchip and Mouser Electronics  Bare metal AVR programming is a great way to write code that is compact, efficient, and easy to maintain. In this episode of Chalk Talk, Ross Satchell from Microchip and I dig into the details of bare metal AVR programming. They take a closer look at the steps involved in this kind of programming, … Read More → "Introduction to Bare Metal AVR Programming — Microchip and Mouser Electronics"
Automated Benchmark Tuning — Synopsys   Benchmarking is a great way to measure the performance of computing resources, but benchmark tuning can be a very complicated problem to solve. In this episode of Chalk Talk, Nozar Nozarian from Synopsys and Amelia Dalton investigate Synopsys’ Optimizer Studio that combines an evolution search algorithm with a powerful user interface that can … Read More → "Automated Benchmark Tuning — Synopsys"
Tackling Automotive Software Cost and Complexity — Mouser Electronics and NXP  With the sheer amount of automotive software cost and complexity today, we need a way to maximize software reuse across our process platforms. In this episode of Chalk Talk, Amelia Dalton and Daniel Balser from NXP take a closer look at the software ecosystem for NXP’s S32K3 MCU. They investigate how real-time drivers, a … Read More → "Tackling Automotive Software Cost and Complexity — Mouser Electronics and NXP"
10X Faster Analog Simulation with PrimeSim Continuum – Synopsys  IC design has come a very long way in a short amount of time. Today, our SoC designs frequently include integrated analog, 100+ Gigabit data rates and 3D stacked DRAM integrated into our SoCs on interposers. In order to keep our heads above water in all of this IC complexity, we need a unified … Read More → "10X Faster Analog Simulation with PrimeSim Continuum – Synopsys"
Solutions for Heterogeneous Multicore — Siemens   Multicore processing is more popular than ever before but how do we take advantage of this new kind of processing? In this episode of Chalk Talk, Jeff Hancock from Siemens and Amelia Dalton investigate the challenges inherent in multicore processing, the benefits of hypervisors and multicore frameworks, and what you need to consider … Read More → "Solutions for Heterogeneous Multicore — Siemens"
Software and Automotive Safety — Siemens  In the realm of automotive designs, safety must reign above all else. But the question remains: how can we innovate within the constraints of today’s safety standards? In this episode of Chalk Talk, Amelia Dalton chats with Rob Bates from Siemens about the role ISO 26262 plays when it comes to COTS and open … Read More → "Software and Automotive Safety — Siemens"