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Parsing Google v. Oracle: What’s It Really Mean?

It’s okay to duplicate an API, even if you have to snarf 11,500 lines of somebody else’s code to do it.

That’s the gist of the ruling from the United States Supreme Court in the long-running case of Google v. Oracle. Left unanswered is the larger question of whether software is even protected by copyright in the first … Read More → "Parsing Google v. Oracle: What’s It Really Mean?"

ID for the IoT? We Need the IDoT!

When most people hear the term “counterfeiting,” their knee-jerk reaction is to think of currency, the counterfeiting of which is as old as the concept of money itself. Around 400 BC, for example, metal coins in Greece were often counterfeited by covering a cheap-and-cheerful material with a thin layer of a more precious metal.

Or take the original American colonies. Throughout northeastern America, Native Americans would employ shell … Read More → "ID for the IoT? We Need the IDoT!"

Want to Learn AI? But Where to Go?

I once worked for a large computer manufacturer that considered itself to be a “big cheese” in its headquarters’ hometown. For some reason, the folks who donned the undergarments of authority and strode the corridors of power decided to have a blitz on the local media channels — including newspapers, radio, and television — to remind the hoi polloi as to who we were and what we did. … Read More → "Want to Learn AI? But Where to Go?"

For the Love of Coffee and Design Verification

Happy Engineers Week! In this week’s Fish Fry podcast, we are celebrating with a whole lot of design verification and even more coffee! Vanessa Cooper (DVCon US 2021 Program Chair) joins us to discuss the details of DVCon US 2021, what’s new with this year’s conference and all of the cool stuff you will learn by attending. Also this week, we check out a new research study that … Read More → "For the Love of Coffee and Design Verification"

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featured blogs
Apr 19, 2021
Cache coherency is not a new concept. Coherent architectures have existed for many generations of CPU and Interconnect designs. Verifying adherence to coherency rules in SoCs has always been one of... [[ Click on the title to access the full blog on the Cadence Community sit...
Apr 19, 2021
Samtec blog readers are used to hearing about high-performance design. However, we see an increase in intertest in power integrity (PI). PI grows more crucial with each design iteration, yet many engineers are just starting to understand PI. That raises an interesting questio...
Apr 15, 2021
Explore the history of FPGA prototyping in the SoC design/verification process and learn about HAPS-100, a new prototyping system for complex AI & HPC SoCs. The post Scaling FPGA-Based Prototyping to Meet Verification Demands of Complex SoCs appeared first on From Silic...
Apr 14, 2021
By Simon Favre If you're not using critical area analysis and design for manufacturing to… The post DFM: Still a really good thing to do! appeared first on Design with Calibre....
chalk talks
Introducing the Visual Verification Suite’s New HDL Creator  Finding errors in a complex HDL design can be a daunting task. And, most errors aren’t detected until late in the design flow. If we could catch our errors earlier, when we are initially writing the code, we could save enormous amounts of time in simulation, synthesis, and layout. In this episode of Chalk … Read More → "Introducing the Visual Verification Suite’s New HDL Creator"
Shift Left for Fewer PCB Re-Spins   Design rule checking (DRC) is becoming more important with today’s complex PCB designs. With the complexity of today’s designs, the old ad-hoc methods just don’t cut it. In this episode of Chalk Talk, Amelia Dalton chats with Rory Riggs from Mentor about how Hyperlynx DRC can help get your next design out on … Read More → "Shift Left for Fewer PCB Re-Spins"
Renesas Synergy™ Platform – Mouser and Renesas IoT product development can have a lot of hidden costs and schedule traps. To get your project done on time and on budget, you really need a centralized development environment that can bring the design flow under control. In this episode of Chalk Talk, Amelia Dalton chats with Henrik Flodell of Renesas about how … Read More → "Renesas Synergy™ Platform – Mouser and Renesas"
GUI Made Easy: Modernize Your Embedded Application in Minutes – Mouser and NXPIs your embedded application struggling with a 1990s user interface? It doesn’t have to be. Developing a clean, attractive, modern user interfaces can be easy if you have the right tools. In this episode of Chalk Talk, Amelia Dalton chats with Brendon Slade of NXP about how to modernize your embedded application GUI – in … Read More → "GUI Made Easy: Modernize Your Embedded Application in Minutes – Mouser and NXP"
Simulating Systems with PSpiceSimple simulation just doesn't cut it with today's complex board designs. To manage the tradeoff between accuracy and performance, you need a variety of models with multiple levels of abstraction. In this episode of Chalk Talk, Amelia Dalton chats with Parag Choudhary of Cadence Design Systems about simulating with PSpice.
Synplify FPGA SynthesisToday’s FPGAs demand a lot from your design tool environment, particularly when it comes to synthesis. With larger designs, more third-party IP, globally-distributed design teams, and increasing performance and power challenges, the demands on synthesis technology are greater than ever. In this episode of Chalk Talk, Amelia Dalton chats with Joe Mallett of Synopsys about … Read More → "Synplify FPGA Synthesis"