Software
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Silexica Bridges the HLS Gap

Today, we call it “acceleration” – the use of specialized hardware to optimize compute tasks that do not perform well on conventional von Neumann processors. We have entered an “age of acceleration” driven primarily by the explosion in AI technology. Countless startups are engaged in developing chips with alternative architectures that accelerate and parallelize various types of compute-intensive algorithms. As a result, we are living in a … Read More → "Silexica Bridges the HLS Gap"

Hyperscale to the Rescue

In this week’s podcast we take a closer look at how the increase of machine to machine data traffic has encouraged a movement toward spine leaf architecture and die-to-die connectivity in hyperscale data centers. Manmeet Walia (Synopsys) joins me this week to discuss the evolution of data center technology and how the challenges surrounding cache currency and network functionality is driving change in the world of hyper scale … Read More → "Hyperscale to the Rescue"

Your RTOS or Mine?

Are you ready to RTOS? Because I am! In this episode of Fish Fry, Mike Skrtic (Percepio) and I discuss RTOS fundamentals, advanced RTOS Techniques, and how you can get a little help with your next RTOS debugging project. Also this week, we check out some cool (and creepy?) new artificial skin technology called “Skin-On” that could make skin-on-skin interactions with our gadgets a reality.

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So Many Verification Cycles, So Little Time

Are you ready for an EDA smorgasbord? In this week’s episode of Fish Fry, we are laying out virtual buffet of emulation, hardware assisted development, enterprise prototyping, and parser platforms for your friday podcasting pleasure. First up, Frank Schirrmeister (Cadence Design Systems) joins us to dish about our growing thirst for verification, the benefits of FPGA based prototyping and why hardware-assisted development is more and more important these … Read More → "So Many Verification Cycles, So Little Time"

Driving Optimization

What do high level synthesis, FPGAs, and the first 3D printer capable of printing fully-functional electronics have in common? This week’s podcast, of course! First up, I chat with Max Odendahl (CEO, Founder – Silexica) about ins and outs of system level understanding and optimization, what we can do with unsynthesizable C/C++ code and how we can tackle the biggest challenges in using Software  (C/C++) for hardware … Read More → "Driving Optimization"

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featured blogs
Jan 27, 2020
Everybody writing software wants it to perform according to its specification and to be reliable. I hope that this is a safe assumption. There are 3 things to be done to achieve these goals: design well; implement carefully; test thoroughly. None of these are optional. A care...
Jan 27, 2020
I see switches everywhere: toggle switches, slider switches, rotary switches, pushbutton switches, magnetic switches, reed switches, mercury switches, smart switches, and'€¦ the list goes on....
Jan 24, 2020
[From the last episode: We looked at the different ways memory can be organized in different kinds of systems.] Let'€™s look at a scenario: you run a restaurant, but you'€™re short on funds to hire people. So you'€™re your own chief cook and bottle-washer. You do everyt...
Jan 23, 2020
Embedded design trends typically revolve around three main ideas: faster data rates, smaller form factors and cost-effective solutions. Those design trends drive the theme for the 2020 Embedded Tech Trends forum: The Business and Technology Forum for Critical and Intelligent ...
chalk talks
Introducing Cadence Cloud Portfolio  EDA in the cloud has finally arrived! Now, when you need access to large amounts of computing power to push your design through those critical stages, there is a secure, reliable, powerful cloud-based system that lets you scale your design tools to meet your actual needs. In this episode of Chalk Talk, Amelia Dalton … Read More → "Introducing Cadence Cloud Portfolio"
Introducing the Visual Verification Suite’s New HDL Creator  Finding errors in a complex HDL design can be a daunting task. And, most errors aren’t detected until late in the design flow. If we could catch our errors earlier, when we are initially writing the code, we could save enormous amounts of time in simulation, synthesis, and layout. In this episode of Chalk … Read More → "Introducing the Visual Verification Suite’s New HDL Creator"
Shift Left for Fewer PCB Re-Spins   Design rule checking (DRC) is becoming more important with today’s complex PCB designs. With the complexity of today’s designs, the old ad-hoc methods just don’t cut it. In this episode of Chalk Talk, Amelia Dalton chats with Rory Riggs from Mentor about how Hyperlynx DRC can help get your next design out on … Read More → "Shift Left for Fewer PCB Re-Spins"
Renesas Synergy™ Platform – Mouser and Renesas IoT product development can have a lot of hidden costs and schedule traps. To get your project done on time and on budget, you really need a centralized development environment that can bring the design flow under control. In this episode of Chalk Talk, Amelia Dalton chats with Henrik Flodell of Renesas about how … Read More → "Renesas Synergy™ Platform – Mouser and Renesas"
GUI Made Easy: Modernize Your Embedded Application in Minutes – Mouser and NXPIs your embedded application struggling with a 1990s user interface? It doesn’t have to be. Developing a clean, attractive, modern user interfaces can be easy if you have the right tools. In this episode of Chalk Talk, Amelia Dalton chats with Brendon Slade of NXP about how to modernize your embedded application GUI – in … Read More → "GUI Made Easy: Modernize Your Embedded Application in Minutes – Mouser and NXP"
Simulating Systems with PSpiceSimple simulation just doesn't cut it with today's complex board designs. To manage the tradeoff between accuracy and performance, you need a variety of models with multiple levels of abstraction. In this episode of Chalk Talk, Amelia Dalton chats with Parag Choudhary of Cadence Design Systems about simulating with PSpice.