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Interview: RISC-V CTO Mark Himelstein

“One man’s constant is another man’s variable.” – programmers’ wisdom

Most engineering firms have a CTO. The Chief Technical Officer sets the technical direction, guides the research, gives the engineers their marching orders, and in between lectures strokes his beard and thinks deeply technical thoughts. 

But what does the CTO of … Read More → "Interview: RISC-V CTO Mark Himelstein"

Advancing into FinFET

In this week’s podcast, we are talking about embedded in-chip monitoring and lifecycle chip design challenges with Stephen Crosher and Oliver King from Moortec. We also take a closer look at a new breakthrough in data storage technology and why a team of researchers from Stanford, UC Berkeley, and Texas A&M believe that tiny slices of tungsten ditelluride may just hold the key to the evolution … Read More → "Advancing into FinFET"

ARM Saturation, Price Hikes, and Possible Spinoff

“We acquire the strength we have overcome.” – Ralph Waldo Emerson

It’s no secret that ARM is the 500-lb. gorilla in the IP-licensing business, but there are new signs that the company may be reaching its peak. Licensing revenue is down slightly, the company is reportedly raising prices to compensate, a Chinese joint venture has gone badly, and … Read More → "ARM Saturation, Price Hikes, and Possible Spinoff"

No More Nanometers

“I learned how to measure before I knew what was size.” – Sofi Tukker, “House Arrest”

Let’s start by speaking some truth. Nothing about the “5 nanometer” CMOS process has any real relationship to five actual nanometers and transistor size. That train jumped off the rails years ago, and the semiconductor industry has inflicted tremendous self-harm by perpetuating the … Read More → "No More Nanometers"

Intel Announces Stratix 10 NX

Intel has announced what they call their “First Intel AI-Optimized FPGA,” the Stratix 10 NX family. The company says these FPGAs “will offer customers customizable, reconfigurable and scalable AI acceleration for compute-demanding applications such as natural language processing and fraud detection.” Intel has bet on all the horses in the AI race, adding “Deep Learning Boost (DL Boost) to their flagship Xeon processors to dramatically accelerate AI … Read More → "Intel Announces Stratix 10 NX"

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featured blogs
Aug 7, 2020
HPC. FinTech. Machine Learning. Network Acceleration. These and many other emerging applications are stressing data center networks. Data center architectures evolve to ensure optimal resource utilization and allocation. PECFF (PCIe® Enclosure Compatible Form Factor) was dev...
Aug 6, 2020
Would you believe that the clever Victorians had incredibly cunning 21-segment incandescent lamp-based displays as far back as 1898?...
Aug 6, 2020
Rigid-flex sounds like something that might be a Crossfit workout-of-the-day. But it is actually a way of doing electronic design for small form factors using flexible PCBs (typically along with some... [[ Click on the title to access the full blog on the Cadence Community s...
Jul 31, 2020
[From the last episode: We looked at the notion of sparsity and how it helps with the math.] We saw before that there are three main elements in a CNN: the convolution, the pooling, and the activation . Today we focus on activation . I'€™ll start by saying that the uses of ...
chalk talks
Cloud Computing for Electronic Design (Are We There Yet?)   When your project is at crunch time, a shortage of server capacity can bring your schedule to a crawl. But, the rest of the year, having a bunch of extra servers sitting around idle can be extremely expensive. Cloud-based EDA lets you have exactly the compute resources you need, when you need them. … Read More → "Cloud Computing for Electronic Design (Are We There Yet?)"
SLX FPGA: Accelerate the Journey from C/C++ to FPGA   High-level synthesis (HLS) brings incredible power to FPGA design. But harnessing the full power of HLS with FPGAs can be difficult even for the most experienced engineering teams. In this episode of Chalk Talk, Amelia Dalton chats with Jordon Inkeles of Silexica about using the SLX FPGA tool to truly harness the power … Read More → "SLX FPGA: Accelerate the Journey from C/C++ to FPGA"
TensorFlow to RTL with High-Level Synthesis — Cadence Design Systems   Bridging the gap from the AI and data science world to the RTL and hardware design world can be challenging. High-level synthesis (HLS) can provide a mechanism to get from AI frameworks like TensorFlow into synthesizable RTL, enabling the development of high-performance inference architectures. In this episode of Chalk Talk, Amelia Dalton chats … Read More → "TensorFlow to RTL with High-Level Synthesis — Cadence Design Systems"
Wide Band Gap: Silicon Carbide — ON Semiconductor and Mouser Electronics  Wide bandgap materials such as silicon carbide are revolutionizing the power industry. From electric vehicles and charging stations to solar power to industrial power supplies, wide bandgap brings efficiency, improved thermal performance, size reduction, and more. In this episode of Chalk Talk, Amelia Dalton chats with Brandon Becker from ON Semiconductor about the advantages … Read More → "Wide Band Gap: Silicon Carbide — ON Semiconductor and Mouser Electronics"
Accelerating Physical Verification Productivity   Physical verification can take an enormous amount of time, and catching errors early in the process is the best way to avoid costly and time-consuming iterations. In this episode of Chalk Talk, Amelia Dalton chats with Christen Decoin of Synopsys about accelerating physical design productivity with tools and methods that can help catch … Read More → "Accelerating Physical Verification Productivity"
Tensilica HiFi DSP   Performing speech recognition at the edge, rather than sending data back to the cloud, is a major engineering challenge. You need significant processing power on a tiny energy budget, and often in a small form-factor. In this episode of Chalk Talk, Amelia Dalton chats with Gerard Andrews of Cadence Design Systems about the … Read More → "Tensilica HiFi DSP"