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Punching Above Their Weight, Achronix Beats the Odds

We first met Achronix back in 2004 and have been following them constantly for sixteen years now. We’ve seen the company go from a founder-funded startup developing revolutionary asynchronous FPGAs in New York using technology licensed from Cornell – to an innovative, successful, mature, Silicon Valley fabless semiconductor and IP company giving the likes of Intel and Xilinx constant trouble in the programmable logic market and staking … Read More → "Punching Above Their Weight, Achronix Beats the Odds"

Interview: RISC-V CTO Mark Himelstein

“One man’s constant is another man’s variable.” – programmers’ wisdom

Most engineering firms have a CTO. The Chief Technical Officer sets the technical direction, guides the research, gives the engineers their marching orders, and in between lectures strokes his beard and thinks deeply technical thoughts. 

But what does the CTO of … Read More → "Interview: RISC-V CTO Mark Himelstein"

Advancing into FinFET

In this week’s podcast, we are talking about embedded in-chip monitoring and lifecycle chip design challenges with Stephen Crosher and Oliver King from Moortec. We also take a closer look at a new breakthrough in data storage technology and why a team of researchers from Stanford, UC Berkeley, and Texas A&M believe that tiny slices of tungsten ditelluride may just hold the key to the evolution … Read More → "Advancing into FinFET"

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Voltus TM IC Power Integrity Solution is a power integrity and analysis signoff solution that is integrated with the full suite of design implementation and signoff tools of Cadence to deliver the... [[ Click on the title to access the full blog on the Cadence Community site...
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chalk talks
Cloud Computing for Electronic Design (Are We There Yet?)   When your project is at crunch time, a shortage of server capacity can bring your schedule to a crawl. But, the rest of the year, having a bunch of extra servers sitting around idle can be extremely expensive. Cloud-based EDA lets you have exactly the compute resources you need, when you need them. … Read More → "Cloud Computing for Electronic Design (Are We There Yet?)"
SLX FPGA: Accelerate the Journey from C/C++ to FPGA   High-level synthesis (HLS) brings incredible power to FPGA design. But harnessing the full power of HLS with FPGAs can be difficult even for the most experienced engineering teams. In this episode of Chalk Talk, Amelia Dalton chats with Jordon Inkeles of Silexica about using the SLX FPGA tool to truly harness the power … Read More → "SLX FPGA: Accelerate the Journey from C/C++ to FPGA"
TensorFlow to RTL with High-Level Synthesis — Cadence Design Systems   Bridging the gap from the AI and data science world to the RTL and hardware design world can be challenging. High-level synthesis (HLS) can provide a mechanism to get from AI frameworks like TensorFlow into synthesizable RTL, enabling the development of high-performance inference architectures. In this episode of Chalk Talk, Amelia Dalton chats … Read More → "TensorFlow to RTL with High-Level Synthesis — Cadence Design Systems"
Wide Band Gap: Silicon Carbide — ON Semiconductor and Mouser Electronics  Wide bandgap materials such as silicon carbide are revolutionizing the power industry. From electric vehicles and charging stations to solar power to industrial power supplies, wide bandgap brings efficiency, improved thermal performance, size reduction, and more. In this episode of Chalk Talk, Amelia Dalton chats with Brandon Becker from ON Semiconductor about the advantages … Read More → "Wide Band Gap: Silicon Carbide — ON Semiconductor and Mouser Electronics"
Accelerating Physical Verification Productivity   Physical verification can take an enormous amount of time, and catching errors early in the process is the best way to avoid costly and time-consuming iterations. In this episode of Chalk Talk, Amelia Dalton chats with Christen Decoin of Synopsys about accelerating physical design productivity with tools and methods that can help catch … Read More → "Accelerating Physical Verification Productivity"
Tensilica HiFi DSP   Performing speech recognition at the edge, rather than sending data back to the cloud, is a major engineering challenge. You need significant processing power on a tiny energy budget, and often in a small form-factor. In this episode of Chalk Talk, Amelia Dalton chats with Gerard Andrews of Cadence Design Systems about the … Read More → "Tensilica HiFi DSP"