In this week’s episode of Fish Fry, Clay Johnson (CEO – CacheQ) joins us to discuss the history of processor performance demands and why today’s designs require a variety of different technologies to increase compute performance. Clay and I also chat about the details of their QCC platform and how their platform is helping software developers leverage the benefits of heterogeneous distributed compute environments. Also this week, we … Read More → "The Acceleration Situation"
“Fast, cheap, or reliable: pick any two” – Racer’s adage
Storing data used to be so easy. You’d MOV or POKE a few bytes into RAM and leave ’em there. If you had to store a lot of data, maybe you’d use an EEPROM, hard drive, or flash memory. Retrieving the data was almost … Read More → "Embedded File Systems: a Tricky Task"
Someday, a new class of semiconductor companies will assemble their products Lego-style, mixing and matching dice from multiple companies. It’s a huge change that’s still a long way off.
More than 146 people from 80 companies signed up for an event last week at IBM’s Almaden Research Center to take some small steps in this direction. It was the … Read More → "Group Puzzles Out Silicon Specs"
With the promises and challenges of artificial intelligence (AI) and, more specifically, machine learning (ML), this is a time of great architectural innovation as developers compete to provide the best ML solutions. All engineering solutions have trade-offs; the trick here is to find the solution(s) with the fewest bad trade-offs.
In that spirit, we have a Read More → "RAMPing Up Always-On AI"
In Part 1 of this series, we looked at the new high-end FPGA families from Achronix, Intel, and Xilinx. We compared the underlying semiconductor processes, the type and amount of programmable logic LUT fabric, the type and amount of DSP/arithmetic resources and their applicability to AI inference acceleration tasks, the claimed TOPS/FLOPS … Read More → "High-End FPGA Showdown – Part 2"
