Subscribe Now


Self-driving cars. Machines that learn. Lightning-fast communication across billions of devices in the datasphere. Synopsys technology is at the heart of innovations that are changing the way people work and play in our era of Smart Everything. We provide the world’s most advanced technologies for chip design, verification, IP integration, and software security and quality testing. In short, we help our customers innovate from silicon to software so they can bring Smart Everything to life.

From Silicon to Software – Latest Posts

Scaling FPGA-Based Prototyping to Meet Verification Demands of Complex SoCs
Apr 15, 2021

Explore the history of FPGA prototyping in the SoC design/verification process and learn about HAPS-100, a new prototyping system for complex AI & HPC SoCs.

Synopsys and IBM Research: Driving Real Progress in Large-Scale AI Silicon and Implementing a Hybrid Cloud Model for Chip Design
Apr 14, 2021

Hybrid Cloud architecture enables innovation in AI chip design; learn how our partnership with IBM combines the best in EDA & HPC to improve AI performance.

NHTSA Shares Best Practices for Improving Automotive Cybersecurity
Apr 13, 2021

We explain the NHTSA's latest automotive cybersecurity best practices, including guidelines to protect automotive ECUs and connected vehicle technologies.

Why Hyper-Convergent Chip Designs Call for a New Approach to Circuit Simulation
Apr 7, 2021

We explore how EDA tools enable hyper-convergent IC designs, supporting the PPA and yield targets required by advanced 3DICs and SoCs used in AI and HPC.

IoT’s Inconvenient Truth: IoT Security Is a Never-Ending Battle
Apr 1, 2021

IoT security is an ongoing battle, requiring innovative solutions to secure data. Explore the latest IoT security solutions & the impact of IoT SoC design.

Your Car Is a Smartphone on Wheels—and It Needs Smartphone Security
Mar 30, 2021

Connected vehicles are now part of the Internet of Things, and need IoT security to match. Explore automotive cybersecurity & the NHTSA, SAE & ISO standards.

How PCI Express 6.0 Can Enhance Bandwidth-Hungry High-Performance Computing SoCs
Mar 25, 2021

Learn how PCIe 6.0 will transform the High Performance Computing (HPC) landscape, delivering double the bandwidth for SoCs in cloud computing & AI applications.

SNUG World 2021 to Inspire Electronic Design Innovation
Mar 24, 2021

SNUG® World 2021 is almost here! See the latest in electronic design automation (EDA) and meet chip design & verification experts from around the world.

Latest Featured Content from Synopsys

featured chalk talk
Yield Explorer and SiliconDash
Apr 12, 2021
539 views
One a design goes to tape-out, the real challenges begin. Teams find themselves drowning in data from design-process-test during production ramp-up, and have to cope with data from numerous sources in different formats in the manufacturing test supply chain. In this episode of Chalk Talk, Amelia Dalton chats with Mark Laird of Synopsys in part three of our series on the Silicon LifeCycle Management (SLM) platform, discussing how Yield Explorer and SiliconDash give valuable insight to engineering and manufacturing teams.
featured chalk talk
In-Chip Sensing and PVT Monitoring
Mar 19, 2021
4,105 views
In-chip monitoring can significantly alter the lifecycle management landscape. By taking advantage of modern techniques, today’s more complex designs can be optimized even after they are deployed. In this episode of Chalk Talk, Amelia Dalton chats with Stephen Crosher of Synopsys about silicon lifecycle management and how to take full advantage of the optimization opportunities available for scalability, reliability, and much more.
featured video
Meeting Cloud Data Bandwidth Requirements with HPC IP
Mar 15, 2021
26,805 views
As people continue to work remotely, demands on cloud data centers have never been higher. Chip designers for high-performance computing (HPC) SoCs are looking to new and innovative IP to meet their bandwidth, capacity, and security needs.
featured chalk talk
Silicon Lifecycle Management (SLM)
Feb 25, 2021
7,038 views
Wouldn’t it be great if we could keep on analyzing our IC designs once they are in the field? After all, simulation and lab measurements can never tell the whole story of how devices will behave in real-world use. In this episode of Chalk Talk, Amelia Dalton chats with Randy Fish of Synopsys about gaining better insight into IC designs through the use of embedded monitors and sensors, and how we can enable a range of new optimizations throughout the lifecycle of our designs.

Chalk Talks Featuring Synopsys

Yield Explorer and SiliconDash
Apr 12, 2021
539 views
One a design goes to tape-out, the real challenges begin. Teams find themselves drowning in data from design-process-test during production ramp-up, and have to cope with data from numerous sources in different formats in the manufacturing test supply chain. In this episode of Chalk Talk, Amelia Dalton chats with Mark Laird of Synopsys in part three of our series on the Silicon LifeCycle Management (SLM) platform, discussing how Yield Explorer and SiliconDash give valuable insight to engineering and manufacturing teams.
In-Chip Sensing and PVT Monitoring
Mar 19, 2021
4,105 views
In-chip monitoring can significantly alter the lifecycle management landscape. By taking advantage of modern techniques, today’s more complex designs can be optimized even after they are deployed. In this episode of Chalk Talk, Amelia Dalton chats with Stephen Crosher of Synopsys about silicon lifecycle management and how to take full advantage of the optimization opportunities available for scalability, reliability, and much more.
Silicon Lifecycle Management (SLM)
Feb 25, 2021
7,038 views
Wouldn’t it be great if we could keep on analyzing our IC designs once they are in the field? After all, simulation and lab measurements can never tell the whole story of how devices will behave in real-world use. In this episode of Chalk Talk, Amelia Dalton chats with Randy Fish of Synopsys about gaining better insight into IC designs through the use of embedded monitors and sensors, and how we can enable a range of new optimizations throughout the lifecycle of our designs.
Accelerating Physical Verification Productivity Part Two
Jan 27, 2021
10,780 views
Physical verification of IC designs at today’s advanced process nodes requires an immense amount of processing power. But, getting your design and verification tools to take full advantage of the compute resources available can be a challenge. In this episode of Chalk Talk, Amelia Dalton chats with Manoz Palaparthi of Synopsys about dramatically improving the performance of your physical verification process. 

Featured Videos from Synopsys

Meeting Cloud Data Bandwidth Requirements with HPC IP
Mar 15, 2021
26,805 views
As people continue to work remotely, demands on cloud data centers have never been higher. Chip designers for high-performance computing (HPC) SoCs are looking to new and innovative IP to meet their bandwidth, capacity, and security needs.
Silicon-Proven Automotive-Grade DesignWare IP
Feb 3, 2021
24,762 views
Get the latest on Synopsys' automotive IP portfolio supporting ISO 26262 functional safety, reliability, and quality management standards, with an available architecture for SoC development and safety management.
Designing your own Processor with ASIP Designer
Feb 3, 2021
24,478 views
Designing your own processor is time-consuming and resource intensive, and it used to be limited to a few experts. But Synopsys’ ASIP Designer tool allows you to design your own specialized processor within your deadline and budget. Watch this video to learn more.
AI SoC Chats: Scaling AI Systems with Die-to-Die Interfaces
Nov 4, 2020
24,185 views
Join Synopsys Interface IP expert Manmeet Walia to understand the trends around scaling AI SoCs and systems while minimizing latency and power by using die-to-die interfaces.
AI SoC Chats: Protecting Data with Security IP
Nov 4, 2020
25,011 views
Understand the threat profiles and security trends for AI SoC applications, including how laws and regulations are changing to protect the private information and data of users. Secure boot, secure debug, and secure communication for neural network engines is critical. Learn how DesignWare Security IP and Hardware Root of Trust can help designers create a secure enclave on the SoC and update software remotely.
Product Update: Broad Portfolio of DesignWare IP for Mobile SoCs
Nov 3, 2020
24,899 views
Get the latest update on DesignWare IP® for mobile SoCs, including MIPI C-PHY/D-PHY, USB 3.1, and UFS, which provide the necessary throughput, bandwidth, and efficiency for today’s advanced mobile SoCs.
Accelerate Automotive Certification with Synopsys Functional Safety Test Solution
Nov 3, 2020
24,946 views
With the Synopsys Functional Safety Test Solution architecture, designers of automotive SoCs can integrate an automated, end-to-end BIST solution to accelerate ISO compliance and time-to-market.
Available DesignWare MIPI D-PHY IP for 22-nm Process
Nov 3, 2020
25,492 views
This video describes the advantages of Synopsys' MIPI D-PHY IP for 22-nm process, available in RX, TX, bidirectional mode, 2 and 4 lanes, operating at 10 Gbps. The IP is ideal for IoT, automotive, and AI Edge applications.