Articles – EEJournal

November 13, 2019

“I don’t want my personality to overshadow my talent.” – Cardi B

What is the IP business, really? You’re buying a product, albeit an intangible one. You pay a license fee and you get a thing in return, like huge and complicated Verilog files or millions of lines of software. Maybe you also get some documentation, or the right to stamp a logo on your product.

I don’t think it’s any of these. At its heart, IP isn’t … Read More → "Imagination Technologies Rents Talent"

Passwords Rent Asunder

The Tide Foundation Proposes Password Splintering for Better Security

by Bryon Moyer

November 12, 2019

The upshot: The Tide Organization tested password splintering and, in one study, found an increase of 14,064,094% in security as compared with “conventional, centralized alternatives.”

Passwords are this horrible thing that we can’t seem to escape. If we’re doing it right, each of the 300-odd passwords we need will be random, long, changed every month, and, of course, never written down anywhere. Yeah right. So… how can we make passwords more secure in the real world?

You want to be able … Read More → "Passwords Rent Asunder"

What the FAQ is the Edge vs. the Far Edge?

by Max Maxfield

November 7, 2019

In a recent Cool Beans column — What the FAQ are the IoT, IIoT, IoHT, and AIoT? – I introduced the concepts of the cloud, the fog, the edge, and the far edge. Since then, I’ve … Read More → "What the FAQ is the Edge vs. the Far Edge?"

High-End FPGA Showdown – Part 3

Design Tools - Where it All Begins

by Kevin Morris

November 6, 2019

In part 1 of this series, we looked at new high-end FPGA families from Xilinx, Intel, and Achronix and discussed their underlying semiconductor processes, the type and amount of programmable logic LUT fabric, the type and amount of DSP/arithmetic resources and their applicability to AI inference acceleration tasks, the claimed TOPS/FLOPS performance capabilities, and on-chip interconnect such as FPGA routing resources and networks-on-chip (NOCs). In part 2, we looked at memory architectures, in-package integration architecture, and high-speed serial … Read More → "High-End FPGA Showdown – Part 3"

Windows Rediscovers the 1970s

Windows Virtual Desktop is a new GUI on an Old Architecture

by Jim Turley

November 5, 2019

“It’s like déjà vu all over again.” – Yogi Berra

Dude, this is so trippy. It’s like a flashback to the 1970s. Where’s my TTY Model 33?

Remember dumb terminals and mainframe computers? Dial-up access and flaky modem connections? Remember when you had limited access to the university’s timesharing computer and a finite number of minutes … Read More → "Windows Rediscovers the 1970s"

SoCs for ML Inference

Hot Chips and Mipsology Attack ML Deployment

by Bryon Moyer

November 4, 2019

The upshot: Trained AI models have to be adapted for specific inference implementations. New inference hardware was presented at Hot Chips by Intel, Xilinx, and Nvidia, and Mipsology has yet another inference option.

This week we bring the natural follow-on to the machine-learning (ML) training piece of a couple of weeks ago: ML Inference. We talked about the overall process before; here we pick up with … Read More → "SoCs for ML Inference"

Achronix and BittWare Accelerate Your Socks Off!

by Max Maxfield

October 31, 2019

Well, the hot news on the street this week -- if you live on a street where people are scampering around performing hardware acceleration on their algorithms -- is that those clever guys and gals at Achronix , who announced their state-of-the-art 7nm Speedster 7t FPGAs a couple of months ago, have teamed up with the creative chaps and chappesses at BittWare (a Molex Company), who just announced their VectorPath S7t-VG6 accelerator card. … Read More →

Renesas Goes Mainstream

New ARM-Based Processors are Not Like the Others

by Jim Turley

October 30, 2019

“You just won’t believe how vastly, hugely, mind-bogglingly big it is.” – Douglas Adams, The Hitchhiker’s Guide to the Galaxy

Renesas is a big company. As a big company, they make lots of different products, chief among them microcontrollers. By some accounts, Renesas is the biggest MCU maker of them all. And yet, most Renesas MCUs seem at bit… odd.

Renesas is like Apple in a sense, in that they do things their own way. The company … Read More → "Renesas Goes Mainstream"

Lattice CrossLinkPlus

Flashback Future FPGAs

by Kevin Morris

October 29, 2019

Three decades ago – at the dawn of programmable logic technology – programmable logic devices such as CPLDs and FPGAs were primarily used for “glue logic.” That is, they could connect just about any digital thing to any other digital thing, regardless of the interface or protocol. In simple terms, FPGAs were digital duct tape.

Those times are long gone, however, with today’s fancy feature-packed devices brimming with memories and multipliers and processors and AI engines, design teams are using FPGAs as full-fledged systems-on-chip (or -in-package). But one of the key … Read More → "Lattice CrossLinkPlus"

Longer Wavelengths for Safer Ranging

Artilux Dips into Short-Wavelength Infrared

by Bryon Moyer

October 28, 2019

The upshot: new NIL/SWIL sensing technology from Artilux uses longer-wavelength light, making ToF measurements safer and more accurate.

Cameras flatten us all. We can see what we’re looking at, but there are two limitations: everything is squished into 2D, so that our noses are in the same plane as the front of our ears; and we can’t tell how far away – or how big – something is without other contextual clues (like using a penny for reference). We can solve this using 3D imaging. Lidar is … Read More → "Longer Wavelengths for Safer Ranging"