Last November, our industry celebrated the 75th anniversary of the announcement by Bell Telephone Labs (BTL) of the transistor’s birth. I knew that many facets of the transistor’s invention would be well covered so I didn’t plan to add an article to this pile because I didn’t feel I had much to improve upon what would be written. However, I did read several of these articles including the excellent article titled “The Surface State Job,” written … Read More → "The Transistor at 75: The First Makers, Part 1"
Generally speaking, I tend to duck when someone lobs a business-related press release in my direction. Call me a techno-weenie if you will, but I really don’t care to learn that Company A has been pondering the possibility of potentially signing a letter of intent with Company B to establish a framework within which to commence discussions about the prospect of collaborating on some vaguely defined project at some undefined time in the future.
I would say that I have an unwritten rule (the best kind, in my experience) … Read More → "Performing Extreme AI Analog Compute Sans Semiconductors"
After many delays, Intel has finally launched the long-awaited Sapphire Rapids family of server processors, now named the 4th Generation Intel Xeon Scalable processors and the Intel Xeon CPU Max Series. Both names are mouthfuls, which has become typical of Intel product naming. Also typical is Intel’s ability to change the playing field to its advantage. Here, the changed playing field emphasizes the greatly boosted capabilities of the numerous hardwired accelerators and new instruction set architecture (ISA) extensions that Intel has added to these new server CPUs. … Read More → "Intel Finally Launches Sapphire Rapids: It’s All About The Accelerators, Baby"
NASA Recruits Microchip, SiFive, and RISC-V to Develop 12-Core Processor SoC for Autonomous Space Missions
NASA’s JPL (Jet Propulsion Lab) has selected Microchip to design and manufacture the multi-core High Performance Spaceflight Computer (HPSC) microprocessor SoC based on eight RISC-V X280 cores from SiFive with vector-processing instruction extensions organized into two clusters, with four additional RISC-V cores added for general-purpose computing. The project’s operational goal is to develop “flight computing technology that will provide at least 100 times the computational capacity compared to current spaceflight computers.” During a talk at the recent RISC-V Summit, Pete Fiacco, a member of the HPSC Leadership Team and JPL Consultant, explained the overall HPSC … Read More → "NASA Recruits Microchip, SiFive, and RISC-V to Develop 12-Core Processor SoC for Autonomous Space Missions"
Ever since I started reading science fiction as a bright-eyed and bushy-tailed young lad, I was exposed to the concept of robots that could “think” in that they could perceive the world around them and respond accordingly.
I was particularly impressed by the robots in Isaac Asimov’s stories in books like I Robot, < … Read More → "Who Needs a Network-on-Chip (NoC)? Everyone!"
I love learning how logic designers of the past solved tricky problems with innovative solutions. The more I delve into this sort of thing, the more I say to myself, “Wow! I would never have thought of that!” A great example is binary coded decimal (BCD) because there’s a lot more to this topic than one might, at first, suppose.
In fact, may I make so bold as to say that, even if you’re a digital logic guru boasting a size-16 brain with go-faster stripes on the sides, … Read More → "Mysteries of the Ancients: Binary Coded Decimal (BCD)"
Intel Introduces Two Monolithic Agilex FPGA and SoC Families, Part 2: Sundance Mesa is now the Agilex 5 E-Series
Last September, I published an article on EEJournal.com that described two new Intel Agilex FPGA and SoC device families, the Agilex 5 D-series and an as-yet-unnamed series formerly known as “Sundance Mesa,” introduced at last year’s Intel Innovation. (See “Intel Introduces Two Monolithic Agilex FPGA and SoC Families, Part 1.”) As discussed in that previous article, the two new FPGA/SoC families share many characteristics starting with their monolithic construction. I expected to follow that … Read More → "Intel Introduces Two Monolithic Agilex FPGA and SoC Families, Part 2: Sundance Mesa is now the Agilex 5 E-Series"