Watching AI Evolve
We’ve looked at several AI IP offerings over the last year or so, from Cadence (more than once), Read More → "Watching AI Evolve"
The Significance of Sparsity
What has sparsity done for you lately? In this episode of Fish Fry, we investigate the challenges that surround on-device artificial intelligence processing. Megha Daga (Cadence Design Systems) and I discuss the why the presence of zeroes is becoming more and more important in the development of neural networks and how sparsity can be used for bandwidth and compute reduction. In this week’s News You May Have Missed, … Read More → "The Significance of Sparsity"
Lattice Raises the Bar on Low Power AI
We are all focusing a lot of attention on neural network inference these days. There is lengthy debate about the relative merits of GPUs, high-end FPGAs, and other specialized solutions for generating the most and best inferencing per coloumb. Most of that centers around data center or high-end edge designs. But the real volume for inferencing chips will clearly be in cost-, power-, and space-constrained edge … Read More → "Lattice Raises the Bar on Low Power AI"
AI Meets AC/DC
“For those about to rock, we salute you.” – Brian Johnson
Let’s play a game! First, we’ll divide the players into two teams. The first team includes fluffy kittens, nuns and orphans, baby ducks, and Delta blues guitarists. The second team includes patent trolls, the Ebola virus, personal-liability lawyers, and Brussels sprouts.
Which team does … Read More → "AI Meets AC/DC"
EE Journal Editors’ Choices for World Maker Faire 2018
Our EE Journal Team is back from World Maker Faire 2018! Every year, we take a trip to World Maker Faire in New York City to check out the hundreds of booths at the New York Hall of Science where makers come to “show and tell” their projects. The creations on display at the Faire can range from homemade arts and crafts like needlepoint and quilting, to smart home devices … Read More → "EE Journal Editors’ Choices for World Maker Faire 2018"
Plunify Cloud-powers Xilinx
As FPGA designs have gone from manageable to humongous, the demands on design tools and design tool expertise has risen exponentially. Long gone are the days when an applications engineer could waltz into your lab, click a few magic keys on a laptop, and walk out an hour later, having helped you achieve timing closure on your problematic FPGA design. Now, FPGA tools demand massive amounts … Read More → "Plunify Cloud-powers Xilinx"
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featured blogs
Dec 9, 2018
https://youtu.be/M_d-K4yE_n4 Made on Cadence pathways (camera Sean) Monday: ICCAD and Open-Source CAD Tuesday: Clayton Christensen on the Prosperity Paradox Wednesday: Benedict's Christmas...
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Dec 7, 2018
That's shocking! Insulation Resistance and Dielectric Withstanding Voltage are two of the qualification tests that Samtec performs in-house during part qualification testing. These tests will ensure that when a connector is used in environmental conditions at the rated wo...
Nov 28, 2018
The futuristic concept of testing for a variety of inconsistencies in blood with just a drop seemed within reach with the promising company Theranos....
Nov 14, 2018
People of a certain age, who mindfully lived through the early microcomputer revolution during the first half of the 1970s, know about Bill Godbout. He was that guy who sent out crudely photocopied parts catalogs for all kinds of electronic components, sold from a Quon...