FPGA
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How the FPGA Came To Be, Part 7: Did General Electric invent the PLD and EPLD in 1971?

My long running series titled “How the FPGA Came To Be” (referenced below) chronicles the development of programmable logic starting with programmable diode matrices developed and marketed by Harris Semiconductor starting in the mid-1960s. These diode matrices along with a Mask Programmable Logic Array (MPLA) from National Semiconductor were the inspirations for the short-lived Intersil IM5200 Field Programmable Logic Array (FPLA) and the more successful Signetics 82 … Read More → "How the FPGA Came To Be, Part 7: Did General Electric invent the PLD and EPLD in 1971?"

Want Automated, Certification-Level RISC-V Verification Coverage?

I feel like an old fool (but where are we going to find one at this time of the day?). Almost everything I hear on the technology front these days causes me to have a knee-jerk reaction along the lines of, “Things have certainly changed since those far-off days when I was a bright-eyed, bushy-tailed, newly-minted engineer!”

As I’ve mentioned before, I … Read More → "Want Automated, Certification-Level RISC-V Verification Coverage?"

No Slacking! Put Your Sem;colons to Work [Exclamation Mark Goes Here]

I’m still chafing under the impositions imposed by the punctuation police. I speak of those who don the undergarments of authority and stride the corridors of power. Those despicable despots who dictate I can no longer terminate the titles to my columns with exclamation marks, all the time muttering inscrutable incantations to their SEO gods. Fortunately, I’m not bitter. … Read More → "No Slacking! Put Your Sem;colons to Work [Exclamation Mark Goes Here]"

There’s More Than One Way to Become an Engineer (Part 2)

As we discussed in the initial installment of this 2-part extravaganza, some people pursue a predictable path on their way to engineer-hood (where “-hood” comes from the Middle English “-hode,” which itself comes from the Old English “-hād,” meaning “state of being”). Others, like your humble narrator, end up taking a more circuitous route, which may involve Lady Luck finagling the dice in their favor (I … Read More → "There’s More Than One Way to Become an Engineer (Part 2)"

GOWIN’s “Golly Gosh” Low-Cost High-Performance FPGAs

I remember when the first FPGA waved a cheery hello to the world back in 1985. (I know I’ve talked about this before, but there are always new members to the EE Journal Community who weren’t around when many of the technologies we now take for granted originally appeared on the scene.) This little scamp was the Xilinx XC2064, which boasted an 8×8=64 array of configurable logic … Read More → "GOWIN’s “Golly Gosh” Low-Cost High-Performance FPGAs"

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Sep 19, 2024
I just saw an awesome presidential debate remix video by David Scott (a.k.a. the Kiffness). I'd never heard of David before. I'll never forget him now....
chalk talks
Vector Funnel Methodology for Power Analysis from Emulation to RTL to Signoff – Synopsys  The shift left methodology can help lower power throughout the electronic design cycle. In this episode of Chalk Talk, William Ruby from Synopsys and Amelia Dalton explore the biggest energy efficiency design challenges facing engineers today, how Synopsys can help solve a variety of energy efficiency design challenges and how the shift left methodology … Read More → "Vector Funnel Methodology for Power Analysis from Emulation to RTL to Signoff – Synopsys"
FlyOver® Technology: Twinax FlyOver® System for Next Gen Speeds — Samtec and Mouser  In this episode of Chalk Talk, Amelia Dalton and Matthew Burns from Samtec investigate the challenges of routing high speed data over lossy PCBs. They also discuss the benefits that Samtec’s Flyover® cable assembly systems bring to data center and embedded designs and how Samtec is furthering innovation with their high speed interconnect solutions. … Read More → "FlyOver® Technology: Twinax FlyOver® System for Next Gen Speeds — Samtec and Mouser"
PolarFire® SoC FPGAs: Integrate Linux® in Your Edge Nodes — Microchip and Mouser Electronics  In this episode of Chalk Talk, Amelia Dalton and Diptesh Nandi from Microchip examine the benefits of PolarFire SoC FPGAs for edge computing applications. They explore how the RISC-V-based Architecture, asymmetrical multi-processing, and Linux-based reference solutions make these SoC FPGAs a game changer for edge computing applications. Click here for more information about Microchip … Read More → "PolarFire® SoC FPGAs: Integrate Linux® in Your Edge Nodes — Microchip and Mouser Electronics"
Shift Left with Calibre — Siemens  In this episode of Chalk Talk, Amelia Dalton and David Abercrombie from Siemens investigate the details of Calibre’s shift-left strategy. They take a closer look at how the tools and techniques in this design tool suite can help reduce signoff iterations and time to tapeout while also increasing design quality. Click here for more … Read More → "Shift Left with Calibre — Siemens"
AI/ML System Architecture Connectivity Solutions — Samtec and Mouser Electronics  In this episode of Chalk Talk, Amelia Dalton and Matthew Burns from Samtec investigate a variety of crucial design considerations for AI and ML designs, the role that AI chipsets play in the development of these systems, and why the right connectivity solution can make all the difference when it comes to your machine … Read More → "AI/ML System Architecture Connectivity Solutions — Samtec and Mouser Electronics"
Intel AI Update — Intel and Mouser Electronics  In this episode of Chalk Talk, Amelia Dalton and Peter Tea from Intel explore how Intel is making AI implementation easier than ever before. They examine the typical workflows involved in artificial intelligence designs, the benefits that Intel’s scalable Xeon processor brings to AI projects, and how you can take advantage of the Intel … Read More → "Intel AI Update — Intel and Mouser Electronics"