FPGA
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Efinix co-packages FPGA with SDRAM to shrink board-level real estate footprint

Efinix has just done designers a solid. The company’s new Ti180J484D1 FPGA incorporates a 2Gbit LPDDR4X SDRAM die co-packaged with the FPGA die, which creates a System in Package (SiP) device that results in a smaller footprint on your circuit board. In addition, you won’t need to worry about the precise pcb trace-length matching that’s required to properly connect the DDR … Read More → "Efinix co-packages FPGA with SDRAM to shrink board-level real estate footprint"

Is the world ready for Platypus, Zero ASIC’s open eFPGA IP? CEO Andreas Olofsson is betting that the answer is “Yes”

Embedded FPGA (eFPGA) IP is not new. Several companies including Achronix, Efinix, Flex Logix, Menta, and QuickLogic have been offering FPGA cores for integration into ASICs and SoCs for a while. ASIC designers use eFPGA cores to help future-proof their designs. The eFPGA can be used to patch bugs or add features as needed. These abilities help to avoid a costly and time-consuming re-spin of the … Read More → "Is the world ready for Platypus, Zero ASIC’s open eFPGA IP? CEO Andreas Olofsson is betting that the answer is “Yes”"

A Transition to Software Defined Vehicles: How AMD is Enabling the Next Generation of Smart Cars

My podcast guest this week is Wayne Lyons, Automotive Director at AMD. Wayne and I discuss the trends encouraging the development of software defined vehicles, how AMD is furthering innovation in many different areas within automotive design and the trends Wayne sees sharing the future of automotive technology.

 

Read More → "A Transition to Software Defined Vehicles: How AMD is Enabling the Next Generation of Smart Cars"

Programmable PMICs and Cutting Edge Power Management with AnDAPT

This week my podcast guest is Giovanni Garcea, President of AnDAPT. Giovanni and I discuss the details of AnDAPT’s field programmable PMIC and how engineers can take advantage of AnDAPT’s programmable power solution that it designed with AI called PMIC.AI. Also this week, I check out a new fluid battery that can take any shape developed by researchers at Linköping University. … Read More → "Programmable PMICs and Cutting Edge Power Management with AnDAPT"

Only the Most Epic Embedded Online Conference Ever!

The value of online (virtual) conferences is increasing in leaps and bounds as travel becomes more problematic and time is increasingly at a premium. Some of these events “stand proud in the crowd,” as it were. Allow me to expound, elucidate, and explicate. 

When it comes to embedded space (where no one can hear you scream), the virtual extravaganza on … Read More → "Only the Most Epic Embedded Online Conference Ever!"

TASKBOTs Set to Seamlessly Integrate into Human Workplace Environments

I fear that my poor old cranium has been crammed to capacity with contemporary concepts. For example, I have always understood the abbreviations HIL or HITL to mean “hardware-in-the-loop” in the context of simulation and emulation. Now, however, I have discovered they can also refer to “human-in-the-loop,” which is an experience I’ve not hitherto enjoyed myself. 

When I … Read More → "TASKBOTs Set to Seamlessly Integrate into Human Workplace Environments"

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chalk talks
FPGA-based Prototyping with the Latest High-Capacity FPGA Enables New Use Modes – Siemens  FPGA-based prototyping is an essential tool for any SoC and digital chip design and verification. In this episode of Chalk Talk, Juergen Jaeger from Siemens and Amelia Dalton explore the multitude of benefits of the Veloce proFPGA CS platform from Siemens. They also investigate the debug capabilities, software prototyping and scalable hardware of this … Read More → "FPGA-based Prototyping with the Latest High-Capacity FPGA Enables New Use Modes – Siemens"
ForgeFPGA™: Low Density FPGA Solutions from Renesas — Renesas and Mouser Electronics  In this episode of Chalk Talk, Amelia Dalton and Matthew Leonard from Renesas explore the benefits that ForgeFPGAs, low density FPGA solutions from Renesas, bring to a variety of applications including computing and storage, wearables, consumer electronics and more. They also investigate the LUT structure of these low density FPGAs, how these solutions can … Read More → "ForgeFPGA™: Low Density FPGA Solutions from Renesas — Renesas and Mouser Electronics"
Vector Funnel Methodology for Power Analysis from Emulation to RTL to Signoff – Synopsys  The shift left methodology can help lower power throughout the electronic design cycle. In this episode of Chalk Talk, William Ruby from Synopsys and Amelia Dalton explore the biggest energy efficiency design challenges facing engineers today, how Synopsys can help solve a variety of energy efficiency design challenges and how the shift left methodology … Read More → "Vector Funnel Methodology for Power Analysis from Emulation to RTL to Signoff – Synopsys"
FlyOver® Technology: Twinax FlyOver® System for Next Gen Speeds — Samtec and Mouser  In this episode of Chalk Talk, Amelia Dalton and Matthew Burns from Samtec investigate the challenges of routing high speed data over lossy PCBs. They also discuss the benefits that Samtec’s Flyover® cable assembly systems bring to data center and embedded designs and how Samtec is furthering innovation with their high speed interconnect solutions. … Read More → "FlyOver® Technology: Twinax FlyOver® System for Next Gen Speeds — Samtec and Mouser"
PolarFire® SoC FPGAs: Integrate Linux® in Your Edge Nodes — Microchip and Mouser Electronics  In this episode of Chalk Talk, Amelia Dalton and Diptesh Nandi from Microchip examine the benefits of PolarFire SoC FPGAs for edge computing applications. They explore how the RISC-V-based Architecture, asymmetrical multi-processing, and Linux-based reference solutions make these SoC FPGAs a game changer for edge computing applications. Click here for more information about Microchip … Read More → "PolarFire® SoC FPGAs: Integrate Linux® in Your Edge Nodes — Microchip and Mouser Electronics"
Shift Left with Calibre — Siemens  In this episode of Chalk Talk, Amelia Dalton and David Abercrombie from Siemens investigate the details of Calibre’s shift-left strategy. They take a closer look at how the tools and techniques in this design tool suite can help reduce signoff iterations and time to tapeout while also increasing design quality. Click here for more … Read More → "Shift Left with Calibre — Siemens"