FPGA
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Intel Drives FPGA Expansion

The winds of change are blowing strongly in the FPGA market these days. As programmable logic has matured, a number of lucrative market opportunities have opened up, driven by the rapid deployment of 5G, the revolution in application of AI technology across numerous design types, the transformation of the data center into a complex heterogeneous computing cluster, the overhaul of automotive and transportation technology, and the … Read More → "Intel Drives FPGA Expansion"

Flex Logix Joins the Race to the Inferencing Edge

Have you noticed that there seem to be a lot more products flaunting the fact that they are “Gluten Free” on the supermarket shelves these days? This sort of thing is obviously of interest to the estimated one person out of a hundred who has Celiac disease and is therefore intolerant to gluten, but do these product labels convey useful information … Read More → "Flex Logix Joins the Race to the Inferencing Edge"

Mipsology Brings “Zero Effort” Inference

Like the proverbial carrot-on-a-stick, FPGA-based acceleration has been right in front of our noses, just out of reach, for the better part of three decades. We move closer, and the prize moves farther away. Every few years, we feel some tangible progress, and perhaps cut the distance in half, but asymptotes can be unfriendly bedfellows. The old “reconfigurable computing” vision of FPGAs as replacements for CPUs … Read More → "Mipsology Brings “Zero Effort” Inference"

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featured blogs
Dec 2, 2020
The folks at LEVL are on a mission is to erase your network footprint. Paradoxically, they do this by generating their own 48-bit LEVL-IDs for your devices....
Dec 2, 2020
To arrive at your targeted and optimized PPA, you will need to execute several Innovus runs with a variety of design parameters, commands, and options. You will then need to analyze the data which... [[ Click on the title to access the full blog on the Cadence Community site...
Dec 1, 2020
UCLA’s Maxx Tepper gives us a brief overview of the Ocean High-Throughput processor to be used in the upgrade of the real-time event selection system of the CMS experiment at the CERN LHC (Large Hadron Collider). The board incorporates Samtec FireFly'„¢ optical cable ...
Nov 25, 2020
[From the last episode: We looked at what it takes to generate data that can be used to train machine-learning .] We take a break from learning how IoT technology works for one of our occasional posts on how IoT technology is used. In this case, we look at trucking fleet mana...
chalk talks
PolarFire SoC FPGA Family — Microchip and Mouser Electronics  FPGA SoCs can solve numerous problems for IoT designers. Now, with the growing momentum behind RISC-V, there are FPGA SoCs that feature RISC-V cores as well as low-power, high-security, and high-reliability. In this episode of Chalk Talk, Amelia Dalton chats with KK from Microchip Technology about the new PolarFire SoC family that is ideal … Read More → "PolarFire SoC FPGA Family — Microchip and Mouser Electronics"
Transforming 400V Power for SELV Systems — Vicor and Mouser Electronics  Converting from distribution-friendly voltages like 400V down to locally-useful voltages can be a tough engineering challenge. In SELV systems, many teams turn to BCM converter modules because of their efficiency, form factor, and ease of design-in. In this episode of Chalk Talk, Amelia Dalton chats with Ian Masza of Vicor about transforming 400V into … Read More → "Transforming 400V Power for SELV Systems — Vicor and Mouser Electronics"
Benefits of FPGAs & eFPGA IP in Futureproofing Compute Acceleration   In the quest to accelerate and optimize today’s computing challenges such as AI inference, our system designs have to be flexible above all else. At the confluence of speed and flexibility are today’s new FPGAs and e-FPGA IP. In this episode of Chalk Talk, Amelia Dalton chats with Mike Fitton from Achronix about … Read More → "Benefits of FPGAs & eFPGA IP in Futureproofing Compute Acceleration"
SLX FPGA: Accelerate the Journey from C/C++ to FPGA   High-level synthesis (HLS) brings incredible power to FPGA design. But harnessing the full power of HLS with FPGAs can be difficult even for the most experienced engineering teams. In this episode of Chalk Talk, Amelia Dalton chats with Jordon Inkeles of Silexica about using the SLX FPGA tool to truly harness the power … Read More → "SLX FPGA: Accelerate the Journey from C/C++ to FPGA"
Smart Embedded Vision with PolarFire FPGAs — Microchip and Mouser Electronics   In embedded vision applications, doing AI inference at the edge is often required in order to meet performance and latency demands. But, AI inference requires massive computing power, which can exceed our overall power budget. In this episode of Chalk Talk, Amelia Dalton talks to Avery Williams of Microchip about using FPGAs to … Read More → "Smart Embedded Vision with PolarFire FPGAs — Microchip and Mouser Electronics"
TensorFlow to RTL with High-Level Synthesis — Cadence Design Systems   Bridging the gap from the AI and data science world to the RTL and hardware design world can be challenging. High-level synthesis (HLS) can provide a mechanism to get from AI frameworks like TensorFlow into synthesizable RTL, enabling the development of high-performance inference architectures. In this episode of Chalk Talk, Amelia Dalton chats … Read More → "TensorFlow to RTL with High-Level Synthesis — Cadence Design Systems"