Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.
Cadence Blog – Latest Posts
Cadence Training Has a New Look
The new Cadence training website is online! This newly redesigned website provides an overview of our well-respected training methods and courses, plus offerings that might be new to you. Modern design and top-of-the-page navigation make it easy to find just what you need—q...
Data Center Software: Data Network Functionality
Data networks—systems that use transmission lines, data switching, and system controls to transfer data between different access points—are at the heart of data center operations. To make it easier to manage more aspects of data center operations under one platform, our d...
Wiwynn Is Providing Energy-Optimized Cloud IT Solutions for Data Centers
In the era of AI, as the signal-data rate is increasing, the signal integrity challenges in server designs are also increasing. Wiwynn is a leading cloud IT infrastructure provider committed to providing hyperscale data centers with innovative server, storage, and rack integr...
Unleashing Efficiency: Large Eddy Simulations Revolutionizing Vehicle Design
In the dynamic landscape of automotive design, optimizing aerodynamics is key to achieving peak performance, fuel efficiency, vehicle range, and sustainability. Large eddy simulation (LES), a cutting-edge simulation technique, is reshaping how we approach automotive aerodynam...
The Cloud Advantage: Optimizing PPA and Delivery with Cadence Cerebrus
Graphics processing units (GPUs) have significantly transcended their original purpose, now at the heart of myriad high-performance computing applications. GPUs accelerate processes in fields ranging from artificial intelligence (AI) and machine learning to video editing and ...
Digital Design - New Training Releases, Blogs, Videos and Digital Badges in 2023
Another year has gone by, and – as always - we will not miss to look back at our most-viewed blogs of the year and give an overview OF what else happened in our world of Education throughout the year. During this past year we published 27 more training blogs around Digital ...
Assess Steam Turbine Blade Flutter Using Fidelity CFD FSI Simulations - Part I
Watch the recorded video of the webinar to learn more about Blade Flutter Assessment of a Steam Turbine with Fidelity CFD . Steam turbines stand at the core of the energy sector, propelling the industry towards more efficient energy extraction from steam. Innovation has led t...
Pre-Silicon Software Execution and Performance Validation – A Case Study
In a persistent trend, shrinking IC geometries and higher levels of integration are leading to SoCs packed with increasingly more functionality over time. Much of this functionality is implemented in software running on systems with ever more complex architectures. This creat...
Chalk Talks Featuring Cadence
Faster, More Predictable Path to Multi-Chiplet Design Closure
The challenges for 3D IC design are greater than standard chip design - but they are not insurmountable. In this episode of Chalk Talk, Amelia Dalton chats with Vinay Patwardhan from Cadence Design Systems about the variety of challenges faced by 3D IC designers today and how Cadence’s integrated, high-capacity Integrity 3D IC Platform, with its 3D design planning and implementation cockpit, flow manager and co-design capabilities will not only help you with your next 3D IC design.
Enabling Digital Transformation in Electronic Design with Cadence Cloud
With increasing design sizes, complexity of advanced nodes, and faster time to market requirements - design teams are looking for scalability, simplicity, flexibility and agility. In today’s Chalk Talk, Amelia Dalton chats with Mahesh Turaga about the details of Cadence’s end to end cloud portfolio, how you can extend your on-prem environment with the push of a button with Cadence’s new hybrid cloud and Cadence’s Cloud solutions you can help you from design creation to systems design and more.
Machine-Learning Optimized Chip Design -- Cadence Design Systems
New applications and technology are driving demand for even more compute and functionality in the devices we use every day. System on chip (SoC) designs are quickly migrating to new process nodes, and rapidly growing in size and complexity. In this episode of Chalk Talk, Amelia Dalton chats with Rod Metcalfe about how machine learning combined with distributed computing offers new capabilities to automate and scale RTL to GDS chip implementation flows, enabling design teams to support more, and increasingly complex, SoC projects.
Cloud Computing for Electronic Design (Are We There Yet?)
When your project is at crunch time, a shortage of server capacity can bring your schedule to a crawl. But, the rest of the year, having a bunch of extra servers sitting around idle can be extremely expensive. Cloud-based EDA lets you have exactly the compute resources you need, when you need them. In this episode of Chalk Talk, Amelia Dalton chats with Craig Johnson of Cadence Design Systems about Cadence’s cloud-based EDA solutions.
Featured Content from Cadence
Faster Path to Multi-Chiplet Design Closure with Better Predictability
Discover how Cadence Integrity 3D-IC is reinventing multi-chiplet design. The Integrity™ 3D-IC Platform provides an industry-first holistic and comprehensive 3D-IC design planning, implementation, and analysis platform to take the full system view and perform system-driven optimization of performance, power, and area (PPA) for chiplets and co-design of interposers, packages, and PCBs for 3D-IC applications
3D-IC Design Challenges and Requirements
While there is great interest in 3D-IC technology, it is still in its early phases. Standard definitions are lacking, the supply chain ecosystem is in flux, and design, analysis, verification, and test challenges need to be resolved. Read this paper to learn about design challenges, ecosystem requirements, and needed solutions. While various types of multi-die packages have been available for many years, this paper focuses on 3D integration and packaging of multiple stacked dies.
Dramatically Improve PPA and Productivity with Generative AI
Discover how you can quickly optimize flows for many blocks concurrently and use that knowledge for your next design. The Cadence Cerebrus Intelligent Chip Explorer is a revolutionary, AI-driven, automated approach to chip design flow optimization. Block engineers specify the design goals, and generative AI features within Cadence Cerebrus Explorer will intelligently optimize the design to meet the power, performance, and area (PPA) goals in a completely automated way.
Industry’s First LLM Technology for Chip Design
Read about the first robust proof of concept of a large language model (LLM) in chip design. To focus on this LLM’s conversation skills would be to misunderstand just how powerful this technology stands to be in solving some of chip design’s most pressing challenges—automating the workflow to reduce errors introduced by humans in creating the design specification, the design itself, and all the project documents needed to create a complex semiconductor device.