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A Brief and Personal History of EDA, Part 4: Cadence, Synopsys, and Mentor Graphics – The EDA Era

Rising complexity drove the creation of ever-more-powerful tools for electronic design. When circuit board and IC layouts escaped the bounds of pencil, paper, and manual dexterity, CAD tools from Applicon, Calma, and Computervision appeared. When polygon representations no longer sufficed as the first gate arrays appeared, CAE tools from Daisy, Mentor, and Valid appeared. These CAE companies attempted to provide all-in-one design suites for ICs and circuit … Read More → "A Brief and Personal History of EDA, Part 4: Cadence, Synopsys, and Mentor Graphics – The EDA Era"

Understanding and Optimizing SoC Hardware Performance

Are you involved in developing SoCs? Are you banging your head against the wall, desperately trying to determine why you aren’t obtaining the performance promised by the providers of your processor, interconnect, and DDR memory controller IPs? Do I have good news for you? (Spoiler alert. The answer to the last question is a resounding “Yes!”)

In many ways … Read More → "Understanding and Optimizing SoC Hardware Performance"

AMD Rocks with New Versal Gen 2 AI Edge SoC FPGAs

The awesome new AMD devices to which I’ve just been introduced have sparked a trip down memory lane (I know you’re surprised, because I pride myself on my laser-like focus that prevents me from wandering off into the weeds). I remember the 1970s and early 1980s when we thought the simple programmable logic devices (PLDs) of the time were so cool. Those were heady days … Read More → "AMD Rocks with New Versal Gen 2 AI Edge SoC FPGAs"

A Brief and Personal History of EDA, Part 3: Daisy, Valid, and Mentor Graphics – The CAE Era

By the end of the 1970s, the leading CAD companies, including Calma, Applicon, and Computervision had started to lose interest in the electronics market and turned to mechanical CAD. Quite possibly, this lack of interest reflected the demand by electronics and semiconductor companies for something more than efficient drafting systems. The drawings produced by CAD systems were fully capable of producing photomasks for circuit boards and ICs, … Read More → "A Brief and Personal History of EDA, Part 3: Daisy, Valid, and Mentor Graphics – The CAE Era"

AI, Simulation and A New Frontier of Space Applications

My podcast guest this week is MathWorks Space Segment Manager Ossi Saarela and we are chatting all about the intersection of AI and simulation for space applications! We investigate the challenges that engineers are facing today when it comes to the integration of AI into space systems, how simulation can be used to solve these issues, and why the development of more effective AI models for space applications will … Read More → "AI, Simulation and A New Frontier of Space Applications"

A Brief and Personal History of EDA, Part 2: Calma, Applicon, Computervision, and the CAD Era

Commercial EDA companies started to appear in the 1960s, and a trend of sorts was set. In each new, more advanced generation of EDA tools, three companies tended to dominate. The first EDA generation was the era of digitization. Computers and digitizers started to displace drafting tables and mechanical drafting machines in all engineering disciplines including electrical and electronic engineering. The dominant EDA trio in this CAD ( … Read More → "A Brief and Personal History of EDA, Part 2: Calma, Applicon, Computervision, and the CAD Era"

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featured blogs
Apr 16, 2024
In today's semiconductor era, every minute, you always look for the opportunity to enhance your skills and learning growth and want to keep up to date with the technology. This could mean you would also like to get hold of the small concepts behind the complex chip desig...
Apr 11, 2024
See how Achronix used our physical verification tools to accelerate the SoC design and verification flow, boosting chip design productivity w/ cloud-based EDA.The post Achronix Achieves 5X Faster Physical Verification for Full SoC Within Budget with Synopsys Cloud appeared ...
Mar 30, 2024
Join me on a brief stream-of-consciousness tour to see what it's like to live inside (what I laughingly call) my mind...
chalk talks
SLM Silicon.da Introduction — Synopsys  In this episode of Chalk Talk, Amelia Dalton and Guy Cortez from Synopsys investigate how Synopsys’ Silicon.da platform can increase engineering productivity and silicon efficiency while providing the tool scalability needed for today’s semiconductor designs. They also walk through the steps involved in a SLM workflow and examine how this open and extensible platform … Read More → "SLM Silicon.da Introduction — Synopsys"
Shift Left with Calibre — Siemens  In this episode of Chalk Talk, Amelia Dalton and David Abercrombie from Siemens investigate the details of Calibre’s shift-left strategy. They take a closer look at how the tools and techniques in this design tool suite can help reduce signoff iterations and time to tapeout while also increasing design quality. Click here for more … Read More → "Shift Left with Calibre — Siemens"
One Year of Synopsys Cloud: Adoption, Enhancements and Evolution — Synopsys  The adoption of the cloud in the design automation industry has encouraged innovation across the entire semiconductor lifecycle. In this episode of Chalk Talk, Amelia Dalton chats with Vikram Bhatia from Synopsys about how Synopsys is redefining EDA in the Cloud with the industry’s first complete browser-based EDA-as-a-Service cloud platform. They explore the benefits … Read More → "One Year of Synopsys Cloud: Adoption, Enhancements and Evolution — Synopsys"
Automated Benchmark Tuning — Synopsys   Benchmarking is a great way to measure the performance of computing resources, but benchmark tuning can be a very complicated problem to solve. In this episode of Chalk Talk, Nozar Nozarian from Synopsys and Amelia Dalton investigate Synopsys’ Optimizer Studio that combines an evolution search algorithm with a powerful user interface that can … Read More → "Automated Benchmark Tuning — Synopsys"
Enabling Digital Transformation in Electronic Design with Cadence Cloud — Cadence  With increasing design sizes, complexity of advanced nodes, and faster time to market requirements – design teams are looking for scalability, simplicity, flexibility and agility. In today’s Chalk Talk, Amelia Dalton chats with Mahesh Turaga from Cadence Design Systems about the details of Cadence’s end to end cloud portfolio, how you can extend your … Read More → "Enabling Digital Transformation in Electronic Design with Cadence Cloud — Cadence"
Faster, More Predictable Path to Multi-Chiplet Design Closure — Cadence Design Systems  The challenges for 3D IC design are greater than standard chip design – but they are not insurmountable. In this episode of Chalk Talk, Amelia Dalton chats with Vinay Patwardhan from Cadence Design Systems about the variety of challenges faced by 3D IC designers today and how Cadence’s integrated, high-capacity Integrity 3D IC Platform, … Read More → "Faster, More Predictable Path to Multi-Chiplet Design Closure — Cadence Design Systems"