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Fear the Economic Singularity

In dystopian science fiction, we are taught to fear the technological singularity – the time when artificial super intelligence advances to a point far beyond human intelligence, with a result that profoundly alters human existence. Vivid imagery of automated weapons of doom working to wipe out human civilization and take over the world – or the galaxy – have terrorized generations of sci-fi fans. Stephen Hawking, Elon Musk, and … Read More → "Fear the Economic Singularity"

More than Just Silicon

In this week’s episode of Fish Fry, we investigate the challenges SoC Design with ClioSoft CEO Srinath Anantharaman. Srinath and I are chat about the hidden advantages of IP management, the challenges of global design teams, and how IP reuse can make all the difference in your bottom line. In this week’s Kickstarter corner, we also take a closer look at the details of a new mind-controlled … Read More → "More than Just Silicon"

The Moon, Moore’s Law, and Marketing

I believe that this nation should commit itself to achieving the goal, before this decade is out, of landing a man on the moon and returning him safely to the Earth.

– John F Kennedy, May 25, 1961

The complexity for minimum component costs has increased at a rate of roughly a factor of two per year… by 1975, the number of components per integrated circuit … Read More → "The Moon, Moore’s Law, and Marketing"

Honey, I Shrunk the Semiconductor

In this week’s episode of Fish Fry, we are headed to the smallest of the small process geometries: 2nm! My guest Ruben Molina (Synopsys) and I are talking about how exactly we are going to get started with these tiny process nodes and how technical advisory boards are driving the charge toward standardization and process architecture specification. Also this week, we take a closer look at the world’ … Read More → "Honey, I Shrunk the Semiconductor"

Hey! Hey! What Did You Say?

Speech recognition is becoming more and more critical in IoT designs these days. In this week’s episode of Fish Fry, Gerard Andrews (Cadence Design Systems) and I are talking about the trends in voice control user interfaces, the advantages of locally-enabled speech recognition, and the differences between neural network processing for audio and imaging applications. Also this week, we celebrate Valentine’s Day with a special selection of … Read More → "Hey! Hey! What Did You Say?"

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featured blogs
Apr 23, 2019
Samtec Bulls Eye® test point systems are ideal for high-performance test applications because of their compression interfaces, small footprint, and high cycle count capabilities. Bulls Eye is now available in 50 GHz and 20 GHz designs, with a system up to 70 GHz in developme...
Apr 23, 2019
Paul Cunningham was interviewed by Jim Hogan at the latest ESD Alliance "fireside chat". Ever since Lip-Bu's fireside chat at DAC was interrupted by the fire-alarms due to a real fire,... [[ Click on the title to access the full blog on the Cadence Community s...
Apr 22, 2019
I am honored to have the opportunity to serve as the 2019 DAC Technical Program Chair, and this has been an exceptional year in terms of research and Designer/IP track submitted content. The Design Automation Conference (DAC) was founded in 1964 and is the longest running an...
Jan 25, 2019
Let'€™s face it: We'€™re addicted to SRAM. It'€™s big, it'€™s power-hungry, but it'€™s fast. And no matter how much we complain about it, we still use it. Because we don'€™t have anything better in the mainstream yet. We'€™ve looked at attempts to improve conven...
chalk talks
Tensilica HiFi DSP   Performing speech recognition at the edge, rather than sending data back to the cloud, is a major engineering challenge. You need significant processing power on a tiny energy budget, and often in a small form-factor. In this episode of Chalk Talk, Amelia Dalton chats with Gerard Andrews of Cadence Design Systems about the … Read More → "Tensilica HiFi DSP"
Introducing Cadence Cloud Portfolio  EDA in the cloud has finally arrived! Now, when you need access to large amounts of computing power to push your design through those critical stages, there is a secure, reliable, powerful cloud-based system that lets you scale your design tools to meet your actual needs. In this episode of Chalk Talk, Amelia Dalton … Read More → "Introducing Cadence Cloud Portfolio"
Introducing the Visual Verification Suite’s New HDL Creator  Finding errors in a complex HDL design can be a daunting task. And, most errors aren’t detected until late in the design flow. If we could catch our errors earlier, when we are initially writing the code, we could save enormous amounts of time in simulation, synthesis, and layout. In this episode of Chalk … Read More → "Introducing the Visual Verification Suite’s New HDL Creator"
Understanding Power-Aware SimulationConsidering power delivery and signal integrity separately can lead to suboptimal results in PCB design. Signal return paths can interact with power delivery networks in a number of ways, and power-aware analysis can help identify and correct problems before you build your prototype. In this episode of Chalk Talk, Amelia Dalton chats with Todd Westerhoff … Read More → "Understanding Power-Aware Simulation"
A New Advanced IC Packaging Battlefield  Today, advanced packaging technology has created a new battleground where 2.5D packaging and heterogeneous design drive constraints that span semiconductor, packaging, board, and even system-level design. In this episode of Chalk Talk, Amelia Dalton chats with John Park of Cadence Design Systems about new techniques and tools for advanced IC packaging design. Click here … Read More → "A New Advanced IC Packaging Battlefield"
Shift Left for Fewer PCB Re-Spins   Design rule checking (DRC) is becoming more important with today’s complex PCB designs. With the complexity of today’s designs, the old ad-hoc methods just don’t cut it. In this episode of Chalk Talk, Amelia Dalton chats with Rory Riggs from Mentor about how Hyperlynx DRC can help get your next design out on … Read More → "Shift Left for Fewer PCB Re-Spins"