The upshot: Memories can be arranged such that an “access” becomes a multiply-accumulate function. Storing weights in the memory and using activations as inputs saves data movement and power. And there are multiple ways to do this using RRAM, flash, and SRAM – and then there’s an approach involving DRAM, but it’s completely different.
In the scramble … Read More → "In-Memory Computing"
Work smart. Get things done. – Susan Wojcicki
What’s smarter than smart? This week’s episode of Amelia’s Weekly Fish Fry! Tim Ramsdale (CEO – Agile Analog) reveals how Agile Analog is changing the landscape of analog IP and why their unique design methodology sets their analog IP away from the rest of the pack. In our second interview this week, Tom Yates (Product VP – … Read More → "Get Smart(er)!"
With the promises and challenges of artificial intelligence (AI) and, more specifically, machine learning (ML), this is a time of great architectural innovation as developers compete to provide the best ML solutions. All engineering solutions have trade-offs; the trick here is to find the solution(s) with the fewest bad trade-offs.
In that spirit, we have a Read More → "RAMPing Up Always-On AI"
Two ongoing questions have plagued analog design for many years:
- How can we design analog circuits more quickly and more portably?
- How can we keep up with the growth in circuit size while still providing gold-standard sign-off simulation in a “reasonable” time? The meaning of “reasonable” being somewhat fluid…</ … Read More → "Analog Advancements"
In this week’s Fish Fry, we’re following a microcontroller yellow brick road to a land where analog reigns supreme. Dave Smith (Texas Instruments) joins us to discuss the details of the “Smart Analog Combo” included in in the MSP430 family, the benefits of the configurable signal-chain elements inherent in this solution, and why the … Read More → "Adventures in Micro Land"