fish fry
Subscribe Now

Shaving Hairs and New Electronics: UChicago’s Nanocrystal Breakthrough

Are you ready for some exciting nanocrystal technology? I certainly hope so! In this week’s Fish Fry podcast, Igor Coropceanu joins me to discuss how he and a team of fellow researchers at the University of Chicago discovered a new way to make nanocrystals function together electronically. We explore why this breakthrough in nanocrystal technology could lead to future devices with new abilities, what applications this would be a perfect fit for, and why this study reflects a step forward in new material research as well.

 

 

Click here to download this episode

 

Links for May 13, 2022

Scientists shave ‘hairs’ off nanocrystals to improve their electronic properties

Self-assembly of nanocrystals into strongly electronically coupled all-inorganic supercrystals

 

Click here to check out the Fish Fry Archive.

Click here to subscribe to Fish Fry via Podbean

Click here to get the Fish Fry RSS Feed

Click here to subscribe to Fish Fry via Apple Podcasts

Click here to subscribe to Fish Fry via Spotify

 

Fish Fry Executive Interviews

Anupam Bakshi, CEO – Agnisys

Dave Kleidermacher, CTO – Green Hills Software

Robert Blake, CEO – Achronix

Jack Harding, CEO – eSilicon

Michiel Ligthart, COO – Verific

Simon Davidmann, CEO – Imperas

Jessica Gomez – Rogue Valley Microdevices

Shishpal Rawat, Chairman – Accellera Systems Initiative

Kevin Bromber, CEO – myDevices

Daniel Hansson, CEO – Verifyter

Mark Papermaster, CTO – AMD

David Fried, CTO – Coventor

Dr. Steven LeBoeuf, President – Valencell

David Dutton, CEO – Silvaco

Bob Niemiec, CEO – TwistThink

Allan Martinson, COO – Starship Technologies

Zhihong Liu, Chairman and CEO – ProPlus Solutions

Taher Madraswala, CEO and President – Open-Silicon

Kapil Shankar, CEO and Director – AnDAPT

Dan Fox, CTO – Local Motors

Kim Rowe, Founder and CEO — RoweBots

Lawrence Cooke, Founder and CEO — NovaSolix

Gregg Recupero, CTO — Performance-IP

Alan Grau, CEO — Icon Labs

Carl Alberty, Vice President – Cirrus Logic

Maximilian Odendahl, CEO — Silexica

Finbarr Moynihan, General Manager — MediaTek

Sanjay Pillay, CEO — Austemper

Louis Parks, CEO – SecureRF

Harold Blomquist, CEO – Helix Semiconductor

Dale Dougherty and Sherry Huss, Co-Founders – Maker Faire

David Su, CEO – Atomic Technologies

Mung Chiang, EVP and Dean of Engineering College – Purdue University

Clay Johnson, CEO – CacheQ

Andy Hock, Vice President, Product – Cerebras Systems

Dan Goehl, Co-founder and Chief Business Officer – UltraSense Systems

Charlie Green, Chief Operating & Technical Officer – Powercast

Leave a Reply

featured blogs
May 25, 2023
Register only once to get access to all Cadence on-demand webinars. Unstructured meshing can be automated for much of the mesh generation process, saving significant engineering time and cost. However, controlling numerical errors resulting from the discrete mesh requires ada...
May 24, 2023
Accelerate vision transformer models and convolutional neural networks for AI vision systems with the ARC NPX6 NPU IP, the best processor for edge AI devices. The post Designing Smarter Edge AI Devices with the Award-Winning Synopsys ARC NPX6 NPU IP appeared first on New Hor...
May 8, 2023
If you are planning on traveling to Turkey in the not-so-distant future, then I have a favor to ask....

featured video

Automate PCB P&R Tasks for Designs in Minutes

Sponsored by Cadence Design Systems

Discover how to get a dramatic reduction in design turnaround time by automating your placement, power plane generation, and critical net routing with Cadence® Allegro® X AI technology. Built on and accessed through the Allegro X Design Platform, Allegro X AI reduces P&R tasks from days to minutes with equivalent or higher quality compared with manually designed boards.

Click here for more information

featured contest

Join the AI Generated Open-Source Silicon Design Challenge

Sponsored by Efabless

Get your AI-generated design manufactured ($9,750 value)! Enter the E-fabless open-source silicon design challenge. Use generative AI to create Verilog from natural language prompts, then implement your design using the Efabless chipIgnite platform - including an SoC template (Caravel) providing rapid chip-level integration, and an open-source RTL-to-GDS digital design flow (OpenLane). The winner gets their design manufactured by eFabless. Hurry, though - deadline is June 2!

Click here to enter!

featured chalk talk

Product Blocked by Supply Chain Woes? Digi XBee® RR to the Rescue!
Sponsored by Mouser Electronics and Digi
In this episode of Chalk Talk, Amelia Dalton and Quinn Jones from Digi investigate the benefits that the Digi XBee RR wireless modules can bring to your next design. We also take a closer look at the migration path from Digi XBee 3 to XBee RR, the design aspects you should keep in mind when moving from the Digi XBee 3 to the RR and how the Digi XBee Multi-programmer can help you get exactly the configuration you need in your next design.
Feb 1, 2023
14,854 views