fish fry
Subscribe Now

Maximizing Memory Performance

Performance-IP’s Memory Request Optimizer Pushes Your Design Forward

Step right up, ladies and gentlemen. We’ve got CPUs, GPUs, audio codecs, video accelerators, bailing wire, and duct tape. This week’s Fish Fry is about how you can get all of your component ducks in a row with a little help from Performance-IP. Gregg Recupero (CTO – Performance-IP) and I discuss the details of Performance IP’s Memory Request Optimizer, how you can boost the performance of your design while reducing latency in your memory subsystem, and how Performance-IP works with the EDA big dogs (rather than competing against them). Keeping with our memory theme, we also take a closer look at groundbreaking research from MIT that could completely change our understanding of how memories are formed in the brain.

 

 

Download this episode (right click and save)

Links for April 14, 2017

More information about Performance-IP

Neuroscientists identify brain circuit necessary for memory formation

New Episode of Chalk Talk – Keeping Things Quiet: A New Methodology for Dynamic Range Comparator Noise Analysis

Fish Fry Executive Interviews

Moshe Gavrielov, CEO – Xilinx

Darrin Billerbeck, CEO – Lattice Semiconductor

Bill Neifert, CTO – Carbon Design Systems

Sean Dart, CEO – Forte Design Systems

Paul Kocher, President – Cryptography Research Inc.

Anupam Bakshi, CEO – Agnisys

Dave Kleidermacher, CTO – Green Hills Software

Robert Blake, CEO – Achronix

Jack Harding, CEO – eSilicon

Michiel Ligthart, COO – Verific

Adnan Hamid, CEO – Breker Technologies

Jeff Waters, VP and General Manager – Altera

Simon Davidmann, CEO – Imperas

Ted Miracco, CEO – SmartFlow Compliance Solutions

Cees Links – GreenPeak Technologies

Jessica Gomez – Rogue Valley Microdevices

Shishpal Rawat, Chairman – Accellera Systems Initiative

Kevin Bromber, CEO – myDevices

Daniel Hansson, CEO – Verifyter

Mark Papermaster, CTO – AMD

David Fried, CTO – Coventor

Dr. Steven LeBoeuf, President – Valencell

David Dutton, CEO – Silvaco

Bob Niemiec, CEO – TwistThink

Allan Martinson, COO – Starship Technologies

Zhihong Liu, Chairman and CEO – ProPlus Solutions

Taher Madraswala, CEO and President – Open-Silicon

Kapil Shankar, CEO and Director – AnDAPT

Mike Wishart, CEO – efabless 

Dan Fox, CTO – Local Motors

Maximilian Odendahl, CEO – Silexica 

Carl Alberty, Vice President – Cirrus Logic

Alan Grau, CEO – Icon Labs

Leave a Reply

featured blogs
Jan 25, 2021
A mechanical look at connector skew in your systems.  Electrical and Mechanical requirements collide when looking at interconnects in your electrical system. What can you do about it, how do you plan for it, and how do you pick the most rugged solution that still carries...
Jan 25, 2021
There is a whole portfolio of official "best of CES" awards, 14 of them this year. Of course, every publication lists its own best-of list, but the official CES awards are judged by... [[ Click on the title to access the full blog on the Cadence Community site. ]]...
Jan 22, 2021
I was recently introduced to the concept of a tray that quickly and easily attaches to your car'€™s steering wheel (not while you are driving, of course). What a good idea!...
Jan 20, 2021
Explore how EDA tools & proven IP accelerate the automotive design process and ensure compliance with Automotive Safety Integrity Levels & ISO requirements. The post How EDA Tools and IP Support Automotive Functional Safety Compliance appeared first on From Silicon...

featured paper

Speeding Up Large-Scale EM Simulation of ICs Without Compromising Accuracy

Sponsored by Cadence Design Systems

With growing on-chip RF content, electromagnetic (EM) simulation of passives is critical — from selecting the right RF design candidates to detecting parasitic coupling. Being on-chip, accurate EM analysis requires a tie in to the process technology with process design kits (PDKs) and foundry-certified EM simulation technology. Anything short of that could compromise the RFIC’s functionality. Learn how to get the highest-in-class accuracy and 10X faster analysis.

Click here to download the whitepaper

Featured Chalk Talk

uPOL Technology

Sponsored by Mouser Electronics and TDK

Power modules are a superior solution for many system designs. Their small form factor, high efficiency, ease of design-in, and solid reliability make them a great solution in a wide range of applications. In this episode of Chalk Talk, Amelia Dalton chats with Tony Ochoa of TDK about the new uPOL family of power modules and how they can deliver the power in your next design.

Click here for more information about TDK FS1406 µPOL™ DC-DC Power Modules