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The New Era of Design Verification

Can you imagine a world without mistakes? Maybe it would be cool, but most likely it would be pretty boring. Heck, it might even mean some of us would lose our jobs. This week’s Fish Fry, we visit a conference dedicated to engineering mistakes: DVCon. We investigate three major the themes of this year’s Design Verification Conference: UVM, emulation, and FPGA-based prototyping. Shishpal Rawat (Chairman – Accellera Systems Initiative) and I sit down to discuss the importance of standardization in emulation and UVM, the value of design verification tutorials, and why verification needs to happen at many different levels of abstraction. Also this week, we check out the advantages of an integrated prototyping solution which may just put ad-hoc FPGA-based physical prototyping out of business once and for all.

 

 

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Links for March 4, 2016

More information about DVCon 2016

More information about The Accellera Systems Intiative 

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