fish fry
Subscribe Now

Driving Optimization

HLS, FPGAs, and Converting Unsynthesizable Code with Silexica

What do high level synthesis, FPGAs, and the first 3D printer capable of printing fully-functional electronics have in common? This week’s podcast, of course! First up, I chat with Max Odendahl (CEO, Founder – Silexica) about ins and outs of system level understanding and optimization, what we can do with unsynthesizable C/C++ code and how we can tackle the biggest challenges in using Software  (C/C++) for hardware design. Also this week, we check out a new Kickstarter campaign called eForge that hopes to make 3D printed electronics an everyday reality.

Click here to download this episode

Links for November 8, 2019

More information about Silexica

Kickstarter Corner: eForge – 3D Print Electronics On-Demand

New Episode of Chalk Talk: Small Cell 5G Systems 

 

Click here to check out the Fish Fry Archive.

Click here to subscribe to Fish Fry via Podbean

Click here to get the Fish Fry RSS Feed

Click here to subscribe to Fish Fry via iTunes.

 

Fish Fry Executive Interviews

Anupam Bakshi, CEO – Agnisys

Dave Kleidermacher, CTO – Green Hills Software

Robert Blake, CEO – Achronix

Jack Harding, CEO – eSilicon

Michiel Ligthart, COO – Verific

Adnan Hamid, CEO – Breker Technologies

Simon Davidmann, CEO – Imperas

Ted Miracco, CEO – SmartFlow Compliance Solutions

Jessica Gomez – Rogue Valley Microdevices

Shishpal Rawat, Chairman – Accellera Systems Initiative

Kevin Bromber, CEO – myDevices

Daniel Hansson, CEO – Verifyter

Mark Papermaster, CTO – AMD

David Fried, CTO – Coventor

Dr. Steven LeBoeuf, President – Valencell

David Dutton, CEO – Silvaco

Bob Niemiec, CEO – TwistThink

Allan Martinson, COO – Starship Technologies

Zhihong Liu, Chairman and CEO – ProPlus Solutions

Taher Madraswala, CEO and President – Open-Silicon

Kapil Shankar, CEO and Director – AnDAPT

Dan Fox, CTO – Local Motors

David Su, CEO – Atomic Technologies

Leave a Reply

featured blogs
Apr 12, 2024
Like any software application or electronic gadget, software updates are crucial for Cadence OrCAD X and Allegro X applications as well. These software updates, often referred to as hotfixes, include support for new features and critical bug fixes made available to the users ...
Apr 11, 2024
See how Achronix used our physical verification tools to accelerate the SoC design and verification flow, boosting chip design productivity w/ cloud-based EDA.The post Achronix Achieves 5X Faster Physical Verification for Full SoC Within Budget with Synopsys Cloud appeared ...
Mar 30, 2024
Join me on a brief stream-of-consciousness tour to see what it's like to live inside (what I laughingly call) my mind...

featured video

How MediaTek Optimizes SI Design with Cadence Optimality Explorer and Clarity 3D Solver

Sponsored by Cadence Design Systems

In the era of 5G/6G communication, signal integrity (SI) design considerations are important in high-speed interface design. MediaTek’s design process usually relies on human intuition, but with Cadence’s Optimality Intelligent System Explorer and Clarity 3D Solver, they’ve increased design productivity by 75X. The Optimality Explorer’s AI technology not only improves productivity, but also provides helpful insights and answers.

Learn how MediaTek uses Cadence tools in SI design

featured chalk talk

Introduction to the i.MX 93 Applications Processor Family
Robust security, insured product longevity, and low power consumption are critical design considerations of edge computing applications. In this episode of Chalk Talk, Amelia Dalton chats with Srikanth Jagannathan from NXP about the benefits of the i.MX 93 application processor family from NXP can bring to your next edge computing application. They investigate the details of the edgelock secure enclave, the energy flex architecture and arm Cortex-A55 core of this solution, and how they can help you launch your next edge computing design.
Oct 23, 2023
22,823 views