Expanding EDA

Newer Tools Let You Do More than Just Electronics

by Bryon Moyer

Welcome to autumn. It’s usually a busy season – although the activity typically starts more with the onset of September and the resumption of school than with the equinox. But it also comes on the heels of a quiet season, even in the overworked US.

And EDA has seemed moderately quiet. So I started looking around to see what I might have been missing, and I’m not sure there’s a lot. But it did get me musing on why things might be quiet for the moment as well as what fills the gap – which gets to the topic of what qualifies as EDA. It’s more than you might think.

At the risk of being obviously over-simple, the legions of coders in EDA-land are doing one of two things: building new technologies or improving on old ones. The new technology category might include support for FinFETs or multi-patterning or the design kits for the latest silicon node. The improvement side of the tree is where performance and capacity and usability are juiced up – all in the name of productivity, of course.  Read More


latest news

October 21, 2014

SMIC Certifies Synopsys IC Validator for Signoff Physical Verification

Synopsys STAR Memory System Multi-Memory Bus Processor Enables 10 Percent Die Size Reduction for Marvell SoC

ASSET InterTech and Mentor Graphics IJTAG interoperability empowers two-way validation flow between chips and boards

Altium and Aras Partner for Next Generation ECAD/MCAD Collaboration in PLM Environments

October 20, 2014

VIA Technologies Cuts Silicon Test Time by 11X Using Synopsys' DFTMAX Ultra

Keysight Technologies Introduces CAN FD and SENT Triggering and Decode Options for InfiniiVision Oscilloscopes

Synopsys Introduces Industry's First On-Chip Memory Test and Repair Solution for Embedded Flash

Kodak Alaris Adopts SpyGlass® for FPGA Flow

October 16, 2014

Cadence Announces Industry’s First Multi-Protocol DDR4 and LPDDR4 IP Solution

October 15, 2014

Coverity Releases Security Spotlight Report on Critical Security Defects in Open Source Projects

Keithley Introduces IVy, the First Smart Device App for Source Measure Unit (SMU) Instruments

October 14, 2014

Synopsys Enables Superior Verification Planning and Coverage Analysis with Verdi Coverage

New DesignWare ARC HS38 Processor Doubles Performance for Embedded Linux Applications

October 13, 2014

PRO DESIGN Releases Embedded Processing Platform for FPGA based SoC and IP Prototyping

October 09, 2014

Keysight Technologies Introduces World’s Highest Bandwidth, Lowest Noise Probe for Oscilloscope Power Integrity Measurements

EDA News Archive

Shifting Left

Designing Code, Breaking Code, and the Verification in Between

by Amelia Dalton

Go-Fast FPGA Design

Helpful Hot-Rodding Hints

by Kevin Morris

Going Vertical

Ecosystem for Interposer-based Design?

by Kevin Morris

On The Hunt: Part One

HLS and Sub-atomic Particle Jitter

by Amelia Dalton

Optimization Moves Up a Level

Mentor’s RealTime Designer Rises to RTL

by Bryon Moyer

EDA Article Archive

 

Editors' Blog

Faster Extraction from Cadence

posted by Bryon Moyer

Cadence has upgraded their parasitic extraction tools for the 16-nm node. (28-Aug)

Planning PCB, Package, and Die Together

posted by Bryon Moyer

Cadence’s OrbitIO tries to tie together disparate tools and inefficient ways of planning pinouts. (31-Jul)

Intelligent VIP

posted by Bryon Moyer

Arrow Devices focuses on building semantics into their VIP for a higher level of abstraction. (23-Jul)

Improved FPGA Tool Results

posted by Bryon Moyer

Plunify tries to get the best out of FPGA design tools (21-Jul)

Synopsys’s IP Initiative

posted by Bryon Moyer

Synopsys is taking a holistic view of SoC design using IP, including hardware and software elements. (17-Jun)

EDA Editors' Blog Archive

forum

Clever carpet "printer" brushes pictures onto your rugs

Posted on 10/21/14 at 3:56 AM by BobbyNaylor

These rugs are so cool.I would like to have this type of rug one at my home so I will search out at http://carpetinmotion.com/denver-hardwood-floors/.

New Sound in Town

Posted on 10/20/14 at 10:06 AM by bmoyer

bmoyer
What do you think about Vesper's piezoelectric approach to MEMS microphones?

New Chips are HIPP

Posted on 10/20/14 at 7:13 AM by dougafpga

Dick, I hadn't heard of Gartner (I guess it was Dataquest back then) coming up with the acronym FPGA.
I do recall Xilinx and MMI (their second source) briefly using the term PGA (when presumably they felt that LCA was not a broad enough term) but of cou…

EDA Forum Archive

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