Tools for the Gifted
Packet Plus Brings Debugging to Networking Engineers
Networking engineers are some of the best and brightest among us. There are good reasons for this. Designing networking equipment is a demanding discipline, spanning a wide gamut of areas from analog and signal integrity to digital design to software - and integrating all of these elements at something near their maximum performance potential. In order to get a competitive piece of network hardware out the door, you are literally designing at the bleeding edge of everything. Read More
latest news
January 27, 2012
Agilent Technologies Introduces Industry’s First Reference Clock Multiplier for Receiver Test
ACE announces ABI testing in Rembrandt Release of the SuperTest compiler test and validation suite
January 26, 2012
Agilent Technologies Introduces Add-In Extensions for Compliance Application Software
Apache Sponsors Chip-Packaage-System Workshops at DesignCon
Synopsys Collaborates with Sigrity to Accelerate Signal Integrity Analysis
January 25, 2012
Saelig Introduces Novel Electric Potential Sensor for Non-contact ECG and Gesture Measurements
Yamaha Standardizes on Synopsys' Processor Designer after Cutting DSP Development Time in Half
January 24, 2012
Si2 Organizes 3D Panel at DesignCon 2012
January 23, 2012
January 18, 2012
Saelig Debuts New USB 60MHz Oscilloscope/Logic Analyzer
January 17, 2012
Carbon Extends IP Exchange to Include Virtual Reference Platforms
The Valley of FPGA
Where Green Pastures End
It Has to Get Better
A Look Back at 2011
Editors' Blog
Describing User-Defined Faults
posted by Bryon Moyer
The Cell-Aware fault modeling approach allows ad hoc faults to be identified, but how do you communicate those faults to the test-generation tools? Especially if you have some faults you want to define by hand? (28-Nov)
Power Contributors
posted by Bryon Moyer
Unlike delay, it’s looking like the various contributors to circuit power can be disentangled, simplifying modeling work. (1-Nov)
Bridging Digital and Custom Domains
posted by Bryon Moyer
Synopsys makes it easier to work in both domains. That is, without making it so easy that there’s only one domain… (17-Oct)
Tektronix Moves Further Into the Chip
posted by Bryon Moyer
A short while back, Tektronix acquired Veridae. How does that fit into their vision? (6-Oct)
A Clean, Well-Lighted Place for Models
posted by Bryon Moyer
So you’re going to exercise your new SoC architecture on a virtual platform, but you need models. Where do you go? 1 (5-Oct)
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Hierarchical Design Flows: Design Preservation & Team Design
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Scalable Smart Debugging With ZeBu-Server
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Spartan-6 FPGAs in Video Designs
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Teradici Success Story
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FPGA Design Methods for Fast Turnaround
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