HLS is the New Black

Cadence Stratus Ushers In a New Era

by Kevin Morris

It’s been more than twenty years since I started working on high-level synthesis (HLS). You might say I’ve studied the topic a lot. For most of those two-plus decades, HLS has been widely considered the “design methodology of the future.” And there are those who have held onto the belief that it always will be.

For those of you not in tune with the terms, high-level synthesis is the automatic creation of hardware architectures from behavioral descriptions. At first, HLS was known as “behavioral synthesis.” But, after some early bad experiences, the EDA industry quietly shifted the name over to HLS - hoping that nobody would notice or have episodes of PTSD when confronted with the idea.  Read More

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Intel Plus Altera

Posted on 03/31/15 at 12:21 PM by kleinman


You are spot-on, Intel's motivation is certainly multi-faceted. No doubt they see Altera's business as highly accretive to revenue, to say nothing of the gross margin dollar contribution.

Kevin and I chose to focus on the datacenter angle for …

Intel Plus Altera

Posted on 03/31/15 at 8:58 AM by dougafpga

Nice analysis, but I hope it's not that simple.
If Intel's alleged interest is a single-minded "hold the (data) centre", then what happens to all the other Altera users who suddenly find they are no longer at the focal point of a new "Intel FPGA division…

It’s EUV Season Again

Posted on 03/30/15 at 9:36 AM by bmoyer

Are you confident that EUV will materialize in a useful timeframe? Or are you making other plans?

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