Xilinx Throws Down

Unveils New 16nm UltraScale+ Families

by Kevin Morris

When the #1 FPGA company makes what is arguably their biggest new-technology announcement in a decade, you’d expect there to be a lot of substance. With this week’s announcement of UltraScale+ Virtex, Kintex, and Zynq devices planned to roll out on TSMC’s 16nm FinFET process, the company did not disappoint. This is one of the broadest, most complex announcements we have ever heard from Xilinx. So, with that preface, let’s take a look at what those folks on the south side of San Jose have been up to lately.

In summary, Xilinx is announcing new Virtex, Kintex, and Zynq families of programmable devices with major improvements in capability over previous generations.  Read More


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Xilinx Throws Down

Posted on 02/26/15 at 12:46 PM by TotallyLost

TotallyLost
@gobeavs -- and it wasn't that many years ago that key Xilix staff were brutally vocal putting down folks pioneering C/SystemC to RTL.

Now the company stand is: Vivado HLS accelerates design implementation and verification by enabling C, C++, and Syst…

Xilinx Throws Down

Posted on 02/26/15 at 10:43 AM by kevin

kevin
@gobeavs, I'm as impressed with this announcement as anybody, but I think you're assigning a bit too much nobility to Xilinx and Altera marketing when you say "I don't think Xilinx or Altera put some lame effective LUTs... number out there."

Let's rev…

Xilinx Throws Down

Posted on 02/25/15 at 2:15 PM by gobeavs

Just another nail in the coffin for Achronix. I think it's funny that Achronix puts a LUT count on the hard IP. That is an interesting marketing ploy. I don't think Xilinx or Altera put some lame effective LUTs including hard IP number out there.

You k…

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