Max 10 Kills the CPLD

Altera Redefines Non-volatile FPGAs

by Kevin Morris

The venerable CPLD (Complex Programmable Logic Device), forefather of today’s flourishing FPGA and programmable logic industry, died peacefully in its sleep last night of natural causes. No memorial services are planned. The CPLD is survived by an incredible array of modern, capable devices that take the concept of programmable hardware to places never envisioned by the stately senior sum-of-products statesman.

If you visit the Wikipedia page for “CPLD” you will find a picture of an Altera MAX device (EPM7128), a 2,500 gate-equivalent, 128 macrocell “second generation” CPLD (or “EPLD” as the company was spinning it in those days) which, according to the datasheet, was capable of implementing “complete system-level designs.” That is, of course, if you were designing a “system” that could be implemented in well under 2,500 gates, was all digital, and had a 2-digit number of IOs.  Read More

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Max 10 Kills the CPLD

Posted on 10/01/14 at 3:12 AM by juergenuk

@Steve DevKits are mostly subsidized, so does not count. I meant designed in, product cost, how does it compare Altera - Lattice - Microsemi - Xilinx imlementation ( sorry if I forgot some ). I know there are many variants - any example/volume appreciat…

Expanding EDA

Posted on 09/30/14 at 10:10 PM by Kev

Given that the EDA guys are a rather non-"Agile" bunch I'm not sure they're going to get much done.

Personally I think you can re-apply a lot of EDA tools aimed at hardware design at parallel software design. Parallel stuff is hard to debug, so formal …

Max 10 Kills the CPLD

Posted on 09/30/14 at 11:38 AM by SteveCasselman

@juergenuk You can buy a development board with the largest part for $50. The smallest part is 25 times smaller and yet is still large enough to fit a NIOS processor and 16 DSP units plus logic left over.

Max 10 Kills the CPLD

Posted on 09/30/14 at 11:10 AM by juergenuk

I am missing where this new Altera series fits price wise. Lattice never went to the biggest - but instead a market not so much served by A and X. I have been selling against A and X - or more positively, finding the right niches for Lattice.
So Lattice …

Expanding EDA

Posted on 09/29/14 at 9:57 AM by bmoyer

What do you think about the cycles of EDA and EDA's expanding scope?

Who Controls the Power?

Posted on 09/29/14 at 2:11 AM by GuidoGam

Not a single word about Alpha?

There’s a Processor in My FPGA!

Posted on 09/28/14 at 10:35 PM by JohnSwan

Indeed, Mentor Graphics had the ASAP (Application Specific Assistant Processor)tool 10 years ago. It automated the ability for the user to select a function and push it onto the FPGA fabric. It used an HLS tool of course for the synthesis. Though OpenCL g…

The Four Horsemen

Posted on 09/25/14 at 12:05 PM by Dick Selwood

Dick Selwood
Are we just muddling along? Are we about to stall?

IoT Standards

Posted on 09/22/14 at 5:19 PM by bmoyer

Thanks for the link, Will. I'll look into it.

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