eFPGAs Go Mainstream

For decades, the idea of embedded FPGA fabric has been hanging around the industry like a comic sidekick – providing entertaining conversation, but never really taking part in the plot. The concept seemed solid enough on paper. Put some LUT fabric on your ASIC along with the other stuff and you get additional flexibility, maybe avoiding the almost-inevitable need to park an expensive FPGA right next to your ASIC when … Read More → "eFPGAs Go Mainstream"

Spectre and Meltdown Continuing Coverage

Spectre and Meltdown are possibly the most important (and interesting) security vulnerabilities discovered in the past two decades. Because they capitalize on weaknesses in commonly-used architectural features in many processors, they span numerous vendors, processors, and just about every type of computing device. Billions of processors deployed over the past two decades could be vulnerable.

The EE Journal editorial team is working to bring you the “engineer’ … Read More → "Spectre and Meltdown Continuing Coverage"

Climbing the PowerTree™

From source to sink to the current in-between, this week’s Fish Fry is all about power delivery and how we can solve our power delivery network problems. My guest is Brad Griffin (Cadence Design Systems) and we’re talking about how we can catch the PDN issues earlier in our design cycles and how “shifting left” can make all the difference in your next PCB design. Keeping with … Read More → "Climbing the PowerTree™"

Profiteering from Spectre and Meltdown

OK, I’ve got to say something. Within the past week, I’ve seen numerous examples of companies trying to profiteer from the panic surrounding Spectre and Meltdown – and generating even more panic in the process. In my view, this is unethical and irresponsible. As engineers, this kind of corporate behavior damages public trust in our profession, in our work, and in us personally. We have to do all … Read More → "Profiteering from Spectre and Meltdown"

Be a Great Engineer

There is no question we are in the era of massively collaborative engineering. The world-changing electronic system technologies being developed today – IoT, autonomous cars, AI, robots – are all the products of thousands or tens of thousands of engineers working together, developing new components, subsystems, software, and techniques. The hive-mind approach permeates just about every type of engineering project, and with large multi-disciplined teams attacking each major task, the level … Read More → "Be a Great Engineer"

January 23, 2018
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January 19, 2018
January 18, 2018
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January 15, 2018
January 12, 2018
Posted on Jan 18 at 2:09am by Dick Selwood
Sad that your friend chose 45 as the number of good engineers to equal a great engineer. It really should be 42.
Posted on Jan 15 at 9:08am by Bryon Moyer
What do you think of Minima's approach to DVFS?
Posted on Jan 12 at 3:03pm by cluso99
In 2015 Microsoft unleashed the worst virus upon us !!! It was called Windows 10 and it continues to plague the world! This program can download, install, and run any program desired by its' authors (Microsoft) at any time and without the users (your) permission. It sends data back home without your consent. ...
Posted on Jan 9 at 10:28am by Dick Selwood
One of the predictable reactions was reaching for a lawyer - or my guess is certain lawyers reaching for some clients. Of course - the CEO dumping a shed load of shares doesn't help!
Posted on Jan 9 at 8:11am by Karl Stevens
"whether the FPGA bitstream is open or closed is moot" Right on! Having to generate a new bitstream is not practical for several reasons: 1) The bitstream "configures" the fabric by effectively closing the switches between vertical and horizontal wires in the interconnect and connecting LUTs and FFs to the fabric. ...
Posted on Jan 8 at 3:39pm by Beercandyman
So at least the Jbits approach has gone from "no f'ing way" to a level 5 impact so I'm making a little progress! Jbits can be both a low level approach and a high level approach. The low level part should be done by the FPGA manufactures themselves. Once you go ...
Posted on Jan 8 at 9:09am by Bryon Moyer
What do you think of these new sensor ideas?
Posted on Jan 7 at 1:19pm by Kevin Morris
@Beercandyman, I have now “educated myself” via your suggested reading list, and I’m once again ready and qualified to weigh in. Thanks for the advice on that. I have to say I am not persuaded. Yes, Jbits is interesting. Yes, it appears that, as you say, you could “use ...
Posted on Jan 5 at 1:41pm by Beercandyman
So the way that Jbits worked is that there was a very low level where you (or a hyper-intelligent developer) would describe wire and lookup tables. One level up from there would be functions like add, subtract, multiply, divide ... From there a user would just say A = B + C. It ...
Posted on Jan 4 at 6:15pm by Kevin Morris
@beercandyman - I'm gonna claim that whether the FPGA bitstream is open or closed is moot. The RTL, LUT placements, routing, and other critical parameters ARE accessible with any of the FPGA flows mentioned. There's plenty of critical detail in there to engage/confuse even the bit-craziest software developer. And, ...
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featured blogs
Jan 23, 2018
By Tarek Ramadan – Mentor, A Siemens Business New HDAP designs like FO-WLP require package-level connectivity verification tools and processes. Learn how the Calibre 3DSTACK tool provides a significant advantage over traditional SoC LVS flows. While high density advan...
Jan 23, 2018
New Power Connector Options Increase Design and Performance Options Samtec’s EXTreme Ten60Power™ header and socket system (ET60T/ET60S Series) is available in both power/signal combinations and power only for increased design flexibility. A new 5-row signal option a...
Jan 23, 2018
In my predictions for 2018 piece yesterday, Nibbles: Breakfast Bytes Predictions for 2018 , I wrote: The first amazing thing about this is that even when I was studying computer science back in stone age, before PCs and smartphones and the internet, Roger Needham, my lecturer...
Jan 19, 2018
Artificial intelligence (AI) is reshaping the way the world works, opening up countless opportunities in commercial and industrial systems. Applications span diverse markets such as autonomous driving, medical diagnostics, home appliances, industrial automation, adaptive webs...
Jan 10, 2018
Recently, Electronics Products Magazine announced their 42nd Annual Product of the Year award winners, with Cadence Design Systems winning for their Virtuoso® System Design Platform. According to the article, the editors “have chosen [products] they......
chalk talks
GaN Power Devices   Wide-band gap transistors bring significant advantages in power system design. By allowing higher voltages, frequencies, and temperatures, they can bring serious performance to your next design. In this episode of Chalk Talk, Amelia Dalton chats with Bob Galli from Panasonic about how to take advantage of GaN power transistors. Click here for more … Read More → "GaN Power Devices"
Scaling Embedded Deep Learning Inference Performance with Dedicated Neural Network DSP   Neural networks are taking over a broad range of exciting applications these days. But, the amount of computation required for neural network inferencing can be daunting. In this episode of Chalk Talk, Amelia Dalton chats with Pulin Desai of Cadence Design Systems about some new processor IP designed specifically for neural network inferencing. … Read More → "Scaling Embedded Deep Learning Inference Performance with Dedicated Neural Network DSP"
Understanding the Cellular IoT Revolution Your next IoT design needs wireless connectivity, and you’re not an RF expert, right? For many applications, LTE is a great way to connect your device. In this episode of Chalk Talk, Amelia Dalton chats with Rob Faludi from Digi about RF solutions for IoT. Click here for more information about Digi International XBee® Family … Read More → "Understanding the Cellular IoT Revolution"
Renesas Synergy™ Platform IoT product development can have a lot of hidden costs and schedule traps. To get your project done on time and on budget, you really need a centralized development environment that can bring the design flow under control. In this episode of Chalk Talk, Amelia Dalton chats with Henrik Flodell of Renesas about how … Read More → "Renesas Synergy™ Platform"
Unleash SiC MOSFETS: Extract the Best PerformanceSilicon Carbide MOSFETs can outperform conventional transistors in a number of intriguing ways, but few engineers know how to design with them. In this episode of Chalk Talk, Amelia Dalton talks to Xuning Zhang and Sujit Bangeree of Monolith Semiconductor about how to design Silicon Carbide MOSFETs from Littelfuse into your next design. Click here … Read More → "Unleash SiC MOSFETS: Extract the Best Performance"
Choosing the Proper SuperCap   Supercapacitors bring impressive benefits to numerous applications. But, most designers don’t know the ins and outs of designing with these capable capacitors. In this episode of Chalk Talk, Amelia Dalton chats with Shawn Hansen of AVX about how to take advantage of the latest generation of supercapacitors in your next design. Click here … Read More → "Choosing the Proper SuperCap"