Programmability for the People

Xilinx Kicks Up Cost-Optimized Offering

by Kevin Morris

It’s always fun to fantasize about Ferraris and FinFETs. After all, what true engineer doesn’t get a little tingly talking about terabits of bandwidth, single-digit nanometers, and gazillions of LUTs. But, in practical terms, the vast majority of us don’t have an actual application need for the biggest, fastest FPGAs and SoCs on the market. And, while it’s fun to watch and speculate about which company can cram the most transistors onto an integrated circuit, the reality is that, for most of us, our actual requirements are much more modest.

Fortunately, the programmable logic companies realize this, and, in the midst of all the marketing bravado and chest beating about the new high-end FPGA families, Xilinx is announcing a major upgrade to their non-bleeding-edge families - Zynq, Artix, and - back by popular demand - Spartan.  Read More

Industry News

September 28, 2016

Fifth-Generation CEVA Imaging & Vision Technology Simplifies Delivery of Powerful Deep Learning Solutions on Low-Power Embedded Devices

STMicroelectronics Enhances Access Lines of STM32F4 High-Performance Microcontroller Series, including New 125°C Devices

TT Electronics set to revolutionise the soldier wearables market with its auto‑aligning and self‑coupling textile-mounting garment connector

SiTime Transforms $1.5B Telecom and Networking Timing Market with High-Precision MEMS Oscillators

100MHz to 40GHz RMS Power Detector Offers 1dB Accuracy & 35dB Dynamic Range

Xilinx Extends its Cost-Optimized Portfolio Targeting a Wide Range of Applications Including Embedded Vision and Industrial IoT

STMicroelectronics Reveals High-Efficiency Wireless Battery-Charging Chipset for Smaller, Simpler, Sealed Wearables

September 27, 2016

Imagination licenses UltraSoC IP to deliver system-level debug and optimization capabilities for SoCs

Adesto Introduces EcoXiP™: the Ultimate Memory Solution for Intelligent IoT Devices

Spin Transfer Technologies Develops 20nm Magnetic Tunnel Junction MRAM Technology at On-site R&D Fab

Ericsson raises the bar with high-current 780W power interface module for ATCA applications

Cadence Announces General Availability of Tensilica Xtensa LX7 Processor Architecture, Increasing Floating-Point Scalability to 2 to 64 FLOPS/Cycle

ON Semiconductor Introduces Next Generation Fan Motor Drivers to Simplify and Accelerate Appliance Design

Imperas Expands University Partners Program

Faster, Easier Simplicity Studio Software from Silicon Labs Sets the Pace in Wireless IoT Design

Ampleon launch ultra compact two-stage Doherty amplifier for 4.5 G / LTE Advanced Pro applications

Renesas Electronics Europe Launches EtherCAT® Dedicated Communication SoC for Remote I/O Slave Applications in Industrial Automation

September 26, 2016

Pentek Introduces Evolutionary Jade Architecture with Navigator Design Suite Software Tools

Riverwood Solutions Continues Expansion in the MEMS and Sensor Ecosystem:

Renesas Electronics Delivers Contactless Wireless Charging Solution for Healthcare and Wearable Devices

Sophisticated Power Management IC Pushes Performance Envelope & Enables More Effective Energy Harvesting

Mentor Graphics SystemVision Improves Siemens Building Technologies’ PCB Design Flow Worldwide

September 23, 2016

TSMC and Synopsys Collaboration Delivers Innovative Technologies for the High Performance Compute (HPC) Platform

Pasternack Introduces New Lines of RF and Microwave Waveguide Directional Couplers

Cadence and TSMC Advance 7nm FinFET Designs for Mobile and HPC Platforms

News Archive

Qualcomm Discovers Its Long Tail

…and Other News from Applied Micro and Your TV Maker

by Jim Turley

Abstracting Register Sequences

Write Once, Use Many

by Bryon Moyer

The Core of Innovation

Intermolecular and New Materials Discovery

by Amelia Dalton

Tell Me What to Think

The Crayon Effect and New Product Development

by Jim Turley

Articles Archive




Xilinx vs Intel

Posted on 09/28/16 at 12:53 AM by rcousins

Hey Kevin, I was kind of surprised you didn't throw Xilinx's SDSoC into the conversation - not that it's some kind of magic wand/potion, but I'd be interested to hear your thoughts on the tool as it pertains to the C/C++ --> HDL 'dream'... I seem to vague…

Abstracting Register Sequences

Posted on 09/26/16 at 11:34 AM by bmoyer

What do you think of Agnisys's approach to register sequence specification?

Intel’s First FPGAs

Posted on 09/24/16 at 12:23 PM by KarlS51

It is about time to quit building things from such tiny pieces such as wiring segments and single FFs as that requires too much P&R.

CPUs have been using microcode for generations and many features and bug fixes have been done just with new microcode.

Intel’s First FPGAs

Posted on 09/21/16 at 12:45 AM by TotallyLost

HLL to gates at the 95% level is much easier than one might guess ... although there are parts of some HLL's that do not map well (dynamic allocation in C++ and JAVA, arbitrary pointers in C, etc). I spent a few years at that problem with FpgaC, and made …

Xilinx vs Intel

Posted on 09/20/16 at 4:22 PM by KarlS51

"nothing would be better than a tool suite that could take a legacy C/C++ software application and magically create an optimized, accelerated version that executed on a conventional processor paired with FPGA fabric. Such a tool does not exist, however, n…

Interim Industrial Security

Posted on 09/19/16 at 1:47 PM by bmoyer

What do you think of Icon Labs' approach to securing old networked industrial equipment?

Forum Archive

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chalk talks

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