Silicon chips and the packages that house them have been steadily drawing closer to each other over the years. There are so many pins on individual dice now – and multiple dice are going into single packages. Optimizing which bumps from which dice go to which pins is a non-trivial project.
Part of the problem is that package design and die design have traditionally belonged to different departments using completely different tools that don’t talk to each other. That’s left engineers using Excel and such to try to visualize and plan pinouts.< … Read More → "Planning PCB, Package, and Die Together"