editor's blog
Subscribe Now

Improved FPGA Tool Results

A bit over a year ago, we looked at startup Plunify, who was marketing cloud-based FPGA tool instantiations. I talked to them again at the recent DAC, and they appear to be carrying out the typical modern startup roadmap, where you start with something, find out what people really do with it, and then use that information to drive new, and sometimes wholly different, products.

What they learned with their original offering was that the analytics module was really popular. So they figured out how to harness the information to help automate FPGA design optimization in the FPGA tools.

The result is called InTime, and it rides over the top of the Altera and Xilinx tools. It does a series of builds, watching the results, and then making recommendations to the designer as to which settings and constraints will provide the best results. Notably, it doesn’t touch the RTL, so this is about matching up the existing design with the tool in the most effective way.

This isn’t a typical design space exploration platform, which tends to have an element of random. This is a directed algorithm that looks at the results of the original full runs and then uses those analytics to refine the settings and constraints to achieve results that they claim to be 30-40% better than what design space exploration provides.

Not only does it improve the design at hand, but they say it can learn over time. If you’re using the cloud, then the global tool accumulates the learning, improving over time. One thing that’s changed from their original offering, however, is the cloud focus. While still available, too many companies are reluctant to go to the cloud, so they also support local instantiation. When implemented locally, the learning will accrue to the benefit of all local designs.

You can learn more in their recent announcement.

Leave a Reply

featured blogs
Mar 27, 2020
[From the last episode: We saw how pointers are an important kind of variable, representing data whose location we can'€™t predict in advance.] We saw last time that pointers are used to store the addresses of data stored in memory space that'€™s allocated while the progr...
Mar 27, 2020
Have you ever paused to consider how temptingly tasty electronic circuits would look if their components and copper tracks were mounted on a glass substrate?...
Mar 27, 2020
Solar Power While the cost and benefits of solar power can and have been debated, there'€™s one point that cannot be debated:  the solar energy sector continues to grow.   The solar energy sector has grown 68% over the last decade, and the cost of solar infrastruc...
Mar 26, 2020
Late last week you may have seen the open letter  from our CEO, Tony Hemmelgarn, laying out the steps that Siemens Digital Industries Software is taking to support our customers during the COVID-19 global crisis. All of us are getting use to the “new normal” ...

Featured Video

Industry’s First USB 3.2 Gen 2x2 Interoperability Demo -- Synopsys & ASMedia

Sponsored by Synopsys

Blazingly fast USB 3.2 Gen 2x2 are ready for your SoC. In this video, you’ll see Synopsys and ASMedia demonstrate the throughput available with Synopsys DesignWare USB 3.2 IP.

Learn more about Synopsys USB 3.2