Power is the name of the game in this week’s episode of Amelia’s Weekly Fish Fry. We’re talking about all things power-related; from “Shift Left” power signoff to the super cool capabilities of near threshold voltage computing. Kenneth Chang (Synopsys) joins us to discuss why power integrity and reliability can make or break chip design and how RedHawk Analysis … Read More → "Tower of Power"
The electronic design automation (EDA’s) mission has always been primarily to facilitate the design and verification of electronic circuits. EDA began, of course, with companies like Mentor, Daisy, and Valid providing specialized software for capturing and editing schematic drawings. These tools took the native human-readable language of the designer: schematics, and created the fundamental machine-readable structure of EDA: the netlist.
Pull up a chair. Take a taste. Come join us. Life is so endlessly delicious. — Ruth Reichl
Are you ready for a virtual buffet of verification goodness? I hope so. In this week’s Fish Fry, we’re gobbling down as much verification as we possibly can fit on our podcastin’ plate. First up, Anupam Bakshi (Agnisys) joins us to dish on register specification, automatic … Read More → "Virtual Verification Smorgasbord"
Signal integrity (SI) is the bane of most system designers. Getting those signals to pass intact through all the twists and turns of your design can be a maddening experience. But modern signal integrity design and analysis is the enabling soul of most of today’s high-performance systems. Cadence’s Sigrity tools are an industry leader in the signal and power integrity game, and the recently … Read More → "Sigrity Elevates 3D"
The world is going to hell in a hand basket. I just don’t care anymore.
— Unhappy person
We’ve all experienced this sort of pessimism, either first- or second-hand. It’s the hands-up, “I surrender,” “I’m going to focus on what I can control” feeling… and it’s not the kind of don’ … Read More → "More Gate-Level Automation"
Intel announced last week that they are acquiring structured ASIC company eASIC into their Programmable Systems Group (PSG). If you haven’t been following along in your major merger primer, Intel PSG was formerly known as Altera – one of the two major players in the FPGA market. Altera has played second fiddle to Xilinx in the Duopoly Symphony for the past twenty seasons or so. This … Read More → "Intel Acquires eASIC – Why?"