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DVCon 2024: Seeing Beyond The Next Big Thing in EDA

In this week’s podcast, I chat about the future of EDA, the details of DVCon2024, and the feasibility of artificial intelligence for design verification with Tom Fitzpatrick – DVCon 2024 Conference General Chair. I also investigate new insect-inspired, fully functional micro-robots that may be the smallest, lightest, and fastest mini-robots ever created!

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From Architecture to PCB Schematic in 60 Seconds!

Are you ready to meet the world’s first deterministic AI that helps electronic teams go from architecture to schematic in 60 seconds? We’re talking about algorithmic component selection and schematic generation technology that optimizes billions of component combinations, thereby allowing you to avoid datasheet doom-scrolling, reduce schematic errors, and design for supply chain resilience in minutes. What’s not to love?

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AI Boldly Goes Behind the Beyond

I used to love the title sequence at the beginning of each episode of Star Trek: The Original Series starring William Shatner as Captain James Tiberius Kirk. I’m thinking of the part where the announcer waffled on about the Enterprise’s five-year mission “to boldly go behind the beyond, behind which no man has boldly gone behind, beyond, before” (or words to that effect). … Read More → "AI Boldly Goes Behind the Beyond"

Designing MPU/MCU/SoC/AI Hardware? Are You Sure Your Security Features Are Secure?

I’ve said it before, and I’ll doubtless say it again (actually, now I come to think about it, I’ve said “I’ve said it before, and I’ll doubtless say it again” before, and I’ll doubtless say it again; whatever you do, don’t get me rambling about recursion), I cannot help but don my frowny face when I think about those nefarious … Read More → "Designing MPU/MCU/SoC/AI Hardware? Are You Sure Your Security Features Are Secure?"

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featured blogs
Mar 18, 2024
Innovation in the AI and supercomputing domains is proceeding at a rapid pace, with each new advancement heralding a future more tightly interwoven with the threads of intelligence and computation. Cadence, with the release of its Millennium Platform, co-optimized with NVIDIA...
Mar 18, 2024
Cloud-based EDA tools are critical to accelerating AI chip design and verification; see how NeuReality leveraged cloud-based chip emulation for their 7NR1 NAPU.The post NeuReality Accelerates 7nm AI Chip Tape-Out with Cloud-Based Emulation appeared first on Chip Design....
Mar 5, 2024
Those clever chaps and chapesses at SiTime recently posted a blog: "Decoding Time: Why Leap Years Are Essential for Precision"...
chalk talks
SLM Silicon.da Introduction — Synopsys  In this episode of Chalk Talk, Amelia Dalton and Guy Cortez from Synopsys investigate how Synopsys’ Silicon.da platform can increase engineering productivity and silicon efficiency while providing the tool scalability needed for today’s semiconductor designs. They also walk through the steps involved in a SLM workflow and examine how this open and extensible platform … Read More → "SLM Silicon.da Introduction — Synopsys"
Shift Left with Calibre — Siemens  In this episode of Chalk Talk, Amelia Dalton and David Abercrombie from Siemens investigate the details of Calibre’s shift-left strategy. They take a closer look at how the tools and techniques in this design tool suite can help reduce signoff iterations and time to tapeout while also increasing design quality. Click here for more … Read More → "Shift Left with Calibre — Siemens"
One Year of Synopsys Cloud: Adoption, Enhancements and Evolution — Synopsys  The adoption of the cloud in the design automation industry has encouraged innovation across the entire semiconductor lifecycle. In this episode of Chalk Talk, Amelia Dalton chats with Vikram Bhatia from Synopsys about how Synopsys is redefining EDA in the Cloud with the industry’s first complete browser-based EDA-as-a-Service cloud platform. They explore the benefits … Read More → "One Year of Synopsys Cloud: Adoption, Enhancements and Evolution — Synopsys"
Automated Benchmark Tuning — Synopsys   Benchmarking is a great way to measure the performance of computing resources, but benchmark tuning can be a very complicated problem to solve. In this episode of Chalk Talk, Nozar Nozarian from Synopsys and Amelia Dalton investigate Synopsys’ Optimizer Studio that combines an evolution search algorithm with a powerful user interface that can … Read More → "Automated Benchmark Tuning — Synopsys"
Enabling Digital Transformation in Electronic Design with Cadence Cloud — Cadence  With increasing design sizes, complexity of advanced nodes, and faster time to market requirements – design teams are looking for scalability, simplicity, flexibility and agility. In today’s Chalk Talk, Amelia Dalton chats with Mahesh Turaga from Cadence Design Systems about the details of Cadence’s end to end cloud portfolio, how you can extend your … Read More → "Enabling Digital Transformation in Electronic Design with Cadence Cloud — Cadence"
Faster, More Predictable Path to Multi-Chiplet Design Closure — Cadence Design Systems  The challenges for 3D IC design are greater than standard chip design – but they are not insurmountable. In this episode of Chalk Talk, Amelia Dalton chats with Vinay Patwardhan from Cadence Design Systems about the variety of challenges faced by 3D IC designers today and how Cadence’s integrated, high-capacity Integrity 3D IC Platform, … Read More → "Faster, More Predictable Path to Multi-Chiplet Design Closure — Cadence Design Systems"