In this week’s episode of Fish Fry, we take a closer look at the world of formal verification. Dave Kelf (OneSpin) joins us to discuss the mechanics of systematic verification and random verification and why automotive and other safety-critical applications may prove to be the most effective use of formal verification yet. We also chat about the themes found at this year’ … Read More → "Driving Toward Functionality"
We’ve blissfully led separate, siloed lives for years. IC designer? Someone’s having trouble routing from your pads? “Not my problem.” Package designer? Electricals on a particular signal are sketchy? “Not my problem.” PCB designer? Someone doesn’t like that the drive on an output isn’t high enough to drive your signal? “Not my problem.” It’s so much easier when you have a restricted scope, and … Read More → "Tools for Advanced Packages"
In the old days, business models were pretty straightforward situations. If you were in retail or distribution – you bought stuff and sold it for more. If you were in manufacturing, you made stuff and sold it. If you were in services, you did stuff and charged by the hour or by the service. There wasn’t much creativity involved. Careful choice of business model just wasn’t a critical … Read More → "Business Model Bingo"
If you have attended the Design Automation Conference in the last couple years, you will know that the scope of this event reaches far beyond your standard EDA tools of years past. Sure, we’re still talking about design automation software, but now there’s a whole slew of IP vendors (and their software compatriots), IC packaging companies, embedded FPGA fabric distributors, and more. This week’ … Read More → "Design Automation for Fun and Profit (But Mostly Fun)"
They say you don’t often get second chances. Certainly, there are few examples in the technology world where an entire industry blows a big market opportunity, backs away, and then gets another crack at it later. But, that could possibly happen with EDA and FPGAs. We might be on the verge of a time when the EDA industry could patch the big hole in their collective system design … Read More → "EDA’s Second Chance"
[Editor’s note: this piece has been updated at the end.]
Cadence recently announced neural-network processor IP. It would be pretty simple to jump into the architecture and start from there, but there’s this thing that I don’t think is just me that perhaps we should deal with … Read More → "Neural-Net In a Block"