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Programmable Pile of Parts

FPGAs were conceived as “do anything” chips – Jacks of all Trades. Sure, they were crazy expensive for the number of effective gates they offered, they were a lot slower than custom logic doing the same task, and they drank copious quantities of coulombs getting the job done, but they could be programmed to do exactly your bidding. In a lot of designs, that made the FPGA the no-longer-missing link – … Read More → "Programmable Pile of Parts"

There’s No Business like EDA Business

In this week’s podcast, we welcome Bob Smith from the Electronic System Design (ESD) Alliance to Fish Fry. Bob and I are chat about why the ESD Alliance and SEMI are joining forces, the ESD Alliance’s plans for DAC this year, and we even fit in a little discussion about wine. Also this week, we check out the new artificial intelligence and machine learning program at this … Read More → "There’s No Business like EDA Business"

Seeing and Being Seen

Vision in living beings is a pretty incredible thing. The eyeball hardware and the brain software seem effortlessly to do what we struggle to do in inorganic hardware and software. But we’re making progress. And, today, we take on two vision topics – but, unlike in the past, they’re not closely related. They’re about two very different aspects of vision. And we’ll take them in the … Read More → "Seeing and Being Seen"

Molto Legato Senza Failure

In music, Legato means smooth and connected, without distinct breaks. Or, in electronics parlance – analog. Analog circuits are arguably the most difficult to design and the most complex to simulate. Engineers with mystical knowledge and decades of experience toil endlessly to find just the right combination of component values that will yield the desired results. And that’s just for the nominal case.

Now, try putting that … Read More → "Molto Legato Senza Failure"

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featured blogs
Jun 22, 2018
A myriad of mechanical and electrical specifications must be considered when selecting the best connector system for your design. An incomplete, first-pass list of considerations include the type of termination, available footprint space, processing and operating temperature...
Jun 22, 2018
You can't finish the board before the schematic, but you want it done pretty much right away, before marketing changes their minds again!...
Jun 22, 2018
Last time I worked for Cadence in the early 2000s, Adriaan Ligtenberg ran methodology services and, in particular, something we called Virtual CAD. The idea of Virtual CAD was to allow companies to outsource their CAD group to Cadence. In effect, we would be the CAD group for...
Jun 7, 2018
If integrating an embedded FPGA (eFPGA) into your ASIC or SoC design strikes you as odd, it shouldn'€™t. ICs have been absorbing almost every component on a circuit board for decades, starting with transistors, resistors, and capacitors '€” then progressing to gates, ALUs...
May 24, 2018
Amazon has apparently had an Echo hiccup of the sort that would give customers bad dreams. It sent a random conversation to a random contact. A couple had installed numerous Alexa-enabled devices in the home. At some point, they had a conversation '€“ as couples are wont to...
chalk talks
Debug and Verify FPGA Algorithms with MATLAB and Simulink   Today’s FPGA designs require industrial-strength functional verification. The ad-hoc methods that worked with older, smaller FPGAs just don’t cut it anymore. In this episode of Chalk Talk, Amelia Dalton chats with Eric Cigan of MathWorks about ASIC-strength functional verification with model-based design. Click here for more information about how to verify VHDL and … Read More → "Debug and Verify FPGA Algorithms with MATLAB and Simulink"
Simulation-Based Tuning of Power Electronics Controllers   Power electronics are becoming more complex these days, and simulating your digital power controller gives significant advantages. In this episode of Chalk Talk, Amelia Dalton chats with Arkadiy Turevskiy of MathWorks about how to tune digital power electronics controllers with simulation. Click here for more information about Simulation-Based Tuning of Power Electronics Controllers.
Addressing Challenges with Large SerDes System Designs  The latest high-speed SerDes standards put high demands on PCB design. In this episode of Chalk Talk, Amelia Dalton chats with Cristian Filip of Mentor about best practices and tools you can apply to implementing and validating the SerDes design on your next circuit board. Click here for more information about SerDes Channel Design … Read More → "Addressing Challenges with Large SerDes System Designs"
Via to Via Coupling Through Plane Cavities   Via to via crosstalk can be a challenging issue in PCB design, and there are a number of myths and misconceptions about how to best reduce it. In this episode of Chalk Talk, Amelia Dalton chats with Fadi Deek from Mentor about the physics behind via to via crosstalk and how to best … Read More → "Via to Via Coupling Through Plane Cavities"
Integrating Schematic Integrity Analysis Into Any Design Flow   Schematic integrity problems cause a lot of expensive PCB re-spins. Errors in schematics can lead to schedule delays, manufacturing reruns, support problems, and higher overall project costs. In this episode of Chalk Talk, Amelia Dalton chats with Craig Armenti from Mentor about how Xpedition Schematic Integrity Analysis can help catch and correct errors … Read More → "Integrating Schematic Integrity Analysis Into Any Design Flow"
In-Design DFM Accelerates New Product Design and Introduction ProcessTaking your PCB from design into manufacturing can be a frustrating task. But, with the right up-front planning you can avoid schedule delays and headaches during the transition to production. In this episode of Chalk Talk, Amelia Dalton chats with Hemant Shah and Bryan LaPointe from Cadence Design Systems about DFM for board design. Click … Read More → "In-Design DFM Accelerates New Product Design and Introduction Process"