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New Tools for Managing IP

IP can be a pain in the butt. Any large company will presumably have tons of IP, some from inside, some from outside, being used in a variety of projects. Each piece of IP may be changed to do things differently or even to fix bugs. If two or more projects rely on the same IP, then those changes might benefit all the projects, or they might diverge. Regardless, it can be really, really hard to manage all of this across a large company.

IC Manage recently did a Read More → "New Tools for Managing IP"

An Almost-Cloudy San Diego Day

Not long ago we looked at how EDA is shaping up in the cloud, including work that Synopsys has been doing to make VCS available for bursty relief usage. I was fortunate enough to attend a demo session to show how what has heretofore been an interesting theoretical discussion could be made concrete.

Synopsys spent a lot of effort on cloud computing at DAC this year, including a cloud partners booth. Various names, both obvious and some not so, were in the booth: Amazon, … Read More → "An Almost-Cloudy San Diego Day"

Veridae Drops the Third Shoe

Back in May, we talked about Veridae taking their erstwhile all-things-for-all-designers debug product Clarus and cut its coverage to SoCs only, introducing a new Corus product for FPGAs. And for single FPGAs, to be specific. This left uncovered the other area that the original Clarus was going to cover: multiple FPGAs.

That final piece is now in place, as Certus. So, to summarize, we have:

Other EBL Guys

While complementary e-beam lithography (CEBL) provides a new twist on how EBL can be worked into high-volume manufacturing, there are a couple other companies actively pursuing EBL technology.

KLA-Tencor has a technology they refer to as REBL: reflective electron beam lithography. Funded as a DARPA project, it amasses a whopping 106 beams. Interestingly, the payoff is throughput that’s 100x faster than what a single-beam can do, giving a decidedly sub-linear throughput boost. They’re seeing up to 10 wafers/hour for via and contact … Read More → "Other EBL Guys"

Steve Trimberger becomes ACM Fellow

Tomorrow, Steve Trimberger is to be inducted as an ACM fellow – an honor given to the top one percent of ACM members for achievements in computer science and information technology.  

[Read the press release here]

This strikes me as a significant milestone – not just for Trimberger – who definitely deserves the honor, and  not just for Xilinx – where Steve has done the majority of his work, but for the whole FPGA industry.  It’s unusual for a … Read More → "Steve Trimberger becomes ACM Fellow"

Switching Classes

High-level synthesis (HLS) has been all about C (or C++) to RTL. But when you’re validating your algorithm, it’s easier to work at the TLM level for thorough simulations that can complete in your lifetime. But once you’re done with that and ready to create gates, you need more than a TLM model; you need a detailed pin-level model, and so far that’s been a manual job.

Mentor is trying to make this easier by separating out the interface portion of the module, and then allowing for either TLM … Read More → "Switching Classes"

End-to-End Signal Analysis

When two chips talk to each other, they do so over a convoluted path that involves signals leaving a driver, going to a pad, up through a wire and other package interconnect, up and down and around along a board trace, and back into and through a package to another pad, finally arriving at the desired input. All along the way they brush up against other signals that may also be switching very quickly. Meanwhile, the power driving the output and input circuits may experience noise (and, in fact, that noise may be different on each chip). When you& … Read More → "End-to-End Signal Analysis"

Home-Brewed Emulators

When you need to verify test suites that drag on for millions (or billions) of clock cycles, it really helps to run them on some hardware – assuming you need clock accuracy. Otherwise, well, “legacy code” acquires a new meaning: the project you started and passed to your progeny because simulation couldn’t finish in your lifetime.

There are various emulation systems out there, but if you’ve done a lot of work on your own prototype, then redoing the design on an emulator might seem like redundant work.

In the … Read More → "Home-Brewed Emulators"

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