editor's blog
Subscribe Now

Switching Classes

High-level synthesis (HLS) has been all about C (or C++) to RTL. But when you’re validating your algorithm, it’s easier to work at the TLM level for thorough simulations that can complete in your lifetime. But once you’re done with that and ready to create gates, you need more than a TLM model; you need a detailed pin-level model, and so far that’s been a manual job.

Mentor is trying to make this easier by separating out the interface portion of the module, and then allowing for either TLM or pin-level interfaces. They can synthesize the pin interface from the TLM interface using a library of interface modules. So, currently, if you’re using AMBA, AHB, or a standard point-to-point interface, it will take the abstract TLM interface and convert it to the detailed pin interface needed to create RTL.

In this manner, you interface your abstract TLM model with the virtual prototype as usual; when done, you synthesize the pin interface, change the interface class reference in the C algorithm, and then convert the resulting design to RTL.

More detail in their release

Leave a Reply

featured blogs
Sep 30, 2022
When I wrote my book 'Bebop to the Boolean Boogie,' it was certainly not my intention to lead 6-year-old boys astray....
Sep 30, 2022
Wow, September has flown by. It's already the last Friday of the month, the last day of the month in fact, and so time for a monthly update. Kaufman Award The 2022 Kaufman Award honors Giovanni (Nanni) De Micheli of École Polytechnique Fédérale de Lausanne...
Sep 29, 2022
We explain how silicon photonics uses CMOS manufacturing to create photonic integrated circuits (PICs), solid state LiDAR sensors, integrated lasers, and more. The post What You Need to Know About Silicon Photonics appeared first on From Silicon To Software....

featured video

PCIe Gen5 x16 Running on the Achronix VectorPath Accelerator Card

Sponsored by Achronix

In this demo, Achronix engineers show the VectorPath Accelerator Card successfully linking up to a PCIe Gen5 x16 host and write data to and read data from GDDR6 memory. The VectorPath accelerator card featuring the Speedster7t FPGA is one of the first FPGAs that can natively support this interface within its PCIe subsystem. Speedster7t FPGAs offer a revolutionary new architecture that Achronix developed to address the highest performance data acceleration challenges.

Click here for more information about the VectorPath Accelerator Card

featured paper

Algorithm Verification with FPGAs and ASICs

Sponsored by MathWorks

Developing new FPGA and ASIC designs involves implementing new algorithms, which presents challenges for verification for algorithm developers, hardware designers, and verification engineers. This eBook explores different aspects of hardware design verification and how you can use MATLAB and Simulink to reduce development effort and improve the quality of end products.

Click here to read more

featured chalk talk

TE's Dynamic Series for Robotics

Sponsored by Mouser Electronics and TE Connectivity

If you are designing a robot, a drive system, or any electromechanical system, the dynamic series of connectors from TE Connectivity might be a great solution for your next design. In this episode of Chalk Talk, Amelia Dalton chats with Jennifer Love from TE Connectivity about the design requirements common in robotic applications and why this new flexible connector with its innovative three point contact design, audible locking system, and dedicated tooling make it a great solution for all kinds of robotic designs.

Click here for more information about TE Connectivity Dynamic D8000 Pluggable Connectors