High-level synthesis (HLS) has been all about C (or C++) to RTL. But when you’re validating your algorithm, it’s easier to work at the TLM level for thorough simulations that can complete in your lifetime. But once you’re done with that and ready to create gates, you need more than a TLM model; you need a detailed pin-level model, and so far that’s been a manual job.
Mentor is trying to make this easier by separating out the interface portion of the module, and then allowing for either TLM or pin-level interfaces. They can synthesize the pin interface from the TLM interface using a library of interface modules. So, currently, if you’re using AMBA, AHB, or a standard point-to-point interface, it will take the abstract TLM interface and convert it to the detailed pin interface needed to create RTL.
In this manner, you interface your abstract TLM model with the virtual prototype as usual; when done, you synthesize the pin interface, change the interface class reference in the C algorithm, and then convert the resulting design to RTL.
More detail in their release…
