editor's blog
Subscribe Now

Home-Brewed Emulators

When you need to verify test suites that drag on for millions (or billions) of clock cycles, it really helps to run them on some hardware – assuming you need clock accuracy. Otherwise, well, “legacy code” acquires a new meaning: the project you started and passed to your progeny because simulation couldn’t finish in your lifetime.

There are various emulation systems out there, but if you’ve done a lot of work on your own prototype, then redoing the design on an emulator might seem like redundant work.

In the meantime, Aldec has an HES system that conveniently splits into two: a board and the DVM (Design Verification Manager) software. The unique thing is that the DVM environment can be ported to different boards by Aldec. So they can adapt it to your prototype board.

But real verification acceleration requires the SCE-MI 2.0 standard. This allows much more time-efficient transactions to jump back and forth from the host/software side to the board rather than requiring signal-level information to be laboriously transferred. Serious modern emulators support the SCE-MI standard as a matter of course.

So Aldec just announced that version 2011.04, among other things, supports the SCE-MI 2.0 standard, with speeds up to 4 MHz on 10-million-gate designs. This means that you have the possibility of using your prototype board for emulation as an alternative to buying separate emulator hardware. While the DVM software will need to be compared for such things as debug features, price, etc. with other emulation options – and you would need to work with Aldec to have the port done – it’s an option that, as far as I know, isn’t available anywhere else.

More details in their press release

Leave a Reply

featured blogs
Mar 21, 2023
We explain computational lithography and explore how our partnership with NVIDIA accelerates semiconductor scaling and the chip design flow in the AI age. The post How Synopsys and NVIDIA Are Accelerating Semiconductor Scaling in the AI Age appeared first on New Horizons for...
Mar 20, 2023
Electronic design has evolved over the years to provide methods for optimizing power, space, and energy needs for the most demanding market applications in areas including hyperscale computing, consumer, 5G communications, automotive, mobile, aerospace, industrial, and health...
Mar 10, 2023
A proven guide to enable project managers to successfully take over ongoing projects and get the work done!...

featured video

First CXL 2.0 IP Interoperability Demo with Compliance Tests

Sponsored by Synopsys

In this video, Sr. R&D Engineer Rehan Iqbal, will guide you through Synopsys CXL IP passing compliance tests and demonstrating our seamless interoperability with Teladyne LeCroy Z516 Exerciser. This first-of-its-kind interoperability demo is a testament to Synopsys' commitment to delivering reliable IP solutions.

Learn more about Synopsys CXL here

featured chalk talk

Series Five Product Introduction
Size and weight are critical design considerations when it comes to military and aerospace applications. One way to minimize weight and size in these kinds of designs is to take a closer look at your choice of connectors. In this episode of Chalk Talk, Amelia Dalton chats with Anthony Annunziata from Amphenol Aerospace about the series five next generation connectors from Amphenol Aerospace. They investigate the size and weight advantages that these connectors bring to military and aerospace applications and how you can get started using the series five in your next design.
Nov 3, 2022
17,982 views