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Triple Patterning Explosion

The type of patterning to be used at a given technology node is determined layer-by-layer. At 10 nm, SADP is planned for metals, but contacts are looking like they’ll require triple patterning, according to Mentor’s David Abercrombie.

We’ve talked about LELE coloring before, and algorithms exist to automatically color a circuit with linear scaling – twice as big a circuit takes twice as long to … Read More → "Triple Patterning Explosion"

Isn’t Sensor Fusion CPU-Agnostic?

Sensor fusion is algorithms. And these algorithms are typically executed as software. So that should be simple, right?

Just get your sensor fusion libraries from whomever you prefer (could be the sensor vendor, could be one of the sensor-agnostic folks), and then run it in the processor of your choice.

That processor could be the AP in a phone, although more and more that’s deprecated in favor of sensor hubs and other local, less power-hungry resources. Largely microcontrollers. And there shouldn’t really be any dependence on the specific computing platform chosen & … Read More → "Isn’t Sensor Fusion CPU-Agnostic?"

What is a Maker?

They call themselves “Makers.” As far as I can tell, up until a few years ago, the verb “to make” was an everyday garden-variety word used for a million different innocuous things. Like “to get” or “to do.” But somehow the verb – and in particular, those agents of the activity it denotes, got elevated to capitalized status. They’re not “makers”; they’re “Makers.”

What does that mean?

Well, the first thing you notice about it is a certain self-satisfaction. … Read More → "What is a Maker?"

Comparing Oscillator Temp Compensation

MEMS oscillators are making a serious challenge to quartz these days. We looked at Sand 9’s approach recently, but as I thumbed back through other recent announcements, I came back across one that, in retrospect, had some relevant bits to discuss.

Silicon Labs’ earlier announcement focused on the CMOS+MEMS aspect of their work. At the time, I didn’t see anything I could add to the discussion, so I let the announcementRead More → "Comparing Oscillator Temp Compensation"

Why Is Plastic Package News?

A new device available in a plastic package. Big news! Wow, no one has ever done that before, right?

In so many other cases, this might be a reasonable reaction to a press release announcing a new plastic package. Except when the topic is MEMS. You can never take anything for granted with MEMS, it would seem. Least of all packaging.

So why is this news? It was a pressure sensor from STMicroelectronics. And here’s the deal: pressure sensors have to be open to the environment. That’s how they access the … Read More → "Why Is Plastic Package News?"

Palladium Hybrid

Cadence has announced its latest upgrade to their Palladium emulator family. It has many of the usual improvements you might expect – faster execution, higher capacity, better debug, and such. But there are two other new features that are more than incremental.

The first hybridizes verification between a virtual platform and the emulator. This is not the same as, say, simulation acceleration, where a simulator is running a cycle-accurate model and using the emulator to speed up the particularly intensive bits. In that model, the emulator is “slave” to the simulator.

In the … Read More → "Palladium Hybrid"

Intel to Close Fab, Lay Off 700

Intel is closing its Hudson, Mass. fab and will lay off all 700 employees, according to the Boston Globe. Intel first acquired the Hudson fab when it acquired Digital Semiconductor (part of DEC at that time) back in 1998. At the time, Digital Semiconductor was making the amazing StrongARM chip, the fastest ARM-based microprocessor of its day, by a wide margin. After the acquisition, many of StrongARM’s designers fled to PA Semi, which was later acquired by Apple. Thus, many of the … Read More → "Intel to Close Fab, Lay Off 700"

New Synopsys DFT Offerings

It’s ITC time, and this is when many of the EDA and test folks roll out their new stuff. True to this pattern, Synopsys has announced two new offerings, one of which allows faster SoC testing, the other allowing faster design of the test infrastructure in an SoC.

The first is a rather significant upgrade to their design-for-test (DFT) offering. Called DFTMAX Ultra, it’s a from-the-ground-up revamp of their test compression technology. It addresses compression, test speed, and the number of test pins.

They’ve completely redone their compressions scheme, … Read More → "New Synopsys DFT Offerings"

After all the stringent methods

After all the stringent methods are applied, one is left with a complex system that at times tries to defeat itself, due to competition for resources. Worker functions are suspended during management functions, which depend upon the same faculties for interpretation and execution. Time to space translation on input and space to time for useful output. The disclaimer shipped with most software tells the truth: buyer beware.

There is a remedy, an alternative to TMs that is in and for the time domain vs being relegated to the space domain.

Details on request c.moeller@ … Read More → "After all the stringent methods"

New MEMS Oscillators

Quartz is under attack yet again. While some folks are bringing quartz into non-timing applications, others are trying to squeeze it out of its primary application: timing.

Sand 9 is the latest such company, having just debuted their basic platform. They point to some fundamental limitations of quartz as a material, limitations we’ve lived with for a long time. Issues they highlight in particular are vulnerabilities due to vibration and shock, degradation at high temperatures and frequencies, issues with rapid temperature dips, inconsistencies … Read More → "New MEMS Oscillators"

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