Uniting Balkanized Designs
There used to be a nice, clean division: digital chips were verified using the standard suite of digital verification tools like simulation and formal analysis; analog chips were verified by SPICE (for greatest accuracy). That simplicity is gone based on both the use of digital control of analog blocks and the simple fact that integration is now sweeping analog and digital together more often.
According to Berkeley Design, accuracy and productivity have been hurt by the need for most mixed-signal simulators to translate everything into Verilog-AMS before proceeding. While such translation might be possible, at the very … Read More → "Uniting Balkanized Designs"

