Editors' Blog

Buckle your seat belts: the semi market could be about to explode.

At the Future Horizons Semiconductor Industry Forecast on January 20^th Malcolm Penn was in one of his classic ebullient modes. His message was “It is time to prepare for one of the strongest (and longest) upswings in chip industry history.”

Firstly, the context: this time last year Penn predicted semi sales would grow by 8%, with the most pessimistic case being only 4% and the most optimistic 14%. In fact, with December still to be finalised, it looks like 9.9% for the year.

For 2015 his target is 8.5% growth, with sales of $364.183 billion ($1 billion day). However if … Read More → "Buckle your seat belts: the semi market could be about to explode."

Towards Smaller Solar Inverters

by Kevin Morris

Inverters are getting smaller.

We’re talking here about the inverters used in solar cells to convert the DC that they generate into AC for the grid. But there seem to be a couple of different motivations for this reduction in inverter size; I was made aware of them by a two different product releases. Learn more about solar energy implementations for your home at solar Jindalee.

First came an SoC from Semitech. Semitech has primarily been focused on power-line communications (PLC) on the so-called Smart Grid. … Read More → "Towards Smaller Solar Inverters"

50% Deeper TSVs

by Kevin Morris

We’ve been talking about through-silicon vias (TSVs) for years now, but 2.5D and 3D ICs are still trickling out at the high end.

Processing costs aside, one contributor to higher cost is the impact of TSVs on die size. While we debate the best ways to save a nanometer or two here and there, TSVs operate on a scale three orders of magnitude bigger: microns. And a good part of the reason is aspect ratio: at the current limit of 10:1 or so, then, if you want a 150-µm deep hole, you’re … Read More → "50% Deeper TSVs"

Calypto Refreshes HLS

by Kevin Morris

High-level synthesis (HLS) recently got a round of improvement. Calypto’s Catapult 8 represents yet another fundamental renewal of an EDA tool for improving ease of use and quality of results.

Let’s review some basics. HLS generally refers to the use of C or C++ for specifying untimed design behavior. That’s actually caused some confusion, since SystemC is based on C++. So, … Read More → "Calypto Refreshes HLS"

Calxeda Isn’t Dead Yet

by Kevin Morris

Remember Calxeda? The chipmaker that was going to do super power-efficient server chips based on ARM? Well, that company went under a year ago, but their technology, and some of their personnel, have resurfaced under a new name: Silver Lining Systems.

The new company’s website is barely more than a placeholder, but it does credit Calxeda with developing its technology. It also mentions Foxconn prominently, the Chinese contract manufacturer. The Foxconn afiliation suggests that either it or Silver Lining will be making full server systems, not just … Read More → "Calxeda Isn’t Dead Yet"

Audio-Grade Bits!

by Kevin Morris

If you store your music digitally — and don’t we all? — you want audio grade bits.

Apparently bits aren’t just bits. An audiophile site in the UK just published an article claiming “significant” and “quite marked” difference in sound quality between MP3 files stored on a Hitachi hard disk, a Seagate hard disk, and a flash SSD. The lengthy article goes on to note such perceived differences as “rhythmic drive,” “image soundstaging,” “edgy grain,” “musical intent,” and other … Read More → "Audio-Grade Bits!"

Porous Silicon and Triboelectricity

by Kevin Morris

Last December’s IEDM conference included energy harvesting as a topic; a couple of papers caught my attention. You could almost think of one of them as bridging batteries and capacitors; the other leverages an everyday household phenomenon in a new way.

The first paper, from a collaboration between Intel, Florida Int’l Univ., and Univ. of Turku, demonstrated a way to create porous silicon to increase surface area in a capacitor. They do this with an etch that, in principle, is capable of a 1000:1 aspect ratio, although other limitations limited the etch depth, as … Read More → "Porous Silicon and Triboelectricity"

Semiconductor CapEx to grow 5.6% in 2015

by Jim Turley

Semiconductor, meet cycle. It’s another up/down go-around for semiconductor capital spending, according to the latest Gartner report that predicts that 2015 will be nearly flat compared to 2014. Non-memory (i.e., logic) chipmakers will spend a total of just 0.8% more this year than last, with 5.6% growth in capital equipment. That works out to $65.7 billion overall, with $41.1 billion in shiny new equipment.

As before, the independant foundries will be spending more than the standalone chip makers (IDMs), and memory will be more active than logic. Gartner further … Read More → "Semiconductor CapEx to grow 5.6% in 2015"

Job Openings at AMD

by Jim Turley

Looking for new career opportunities in management? You might try AMD. The big chipmaker just whacked three of its top executives: the General Manager of Computing & Graphics, John Byrne; Chief Marketing Officer, Colette LaForce; and Chief Strategy Officer, Raj Naik. That’s three immediate vacancies in Mahogany Row.

The company isn’t entirely decimated. The heads of HR, Legal, and Operations are still there. And the CTO (Mark Papermaster) and CFO (Devinder Kumar) just got retention bonuses, in the form of new incentive stock options that vest in a couple of years. Issuing them bonuses while … Read More → "Job Openings at AMD"

A Microphone for Gestures and Canines

by Amelia Dalton

A while back, when looking at Elliptic Labs ultrasonic gesture recognition, we mentioned that they were able to do this based on the fact that Knowles microphones worked in the ultrasonic range. But they weren’t willing to say much more about the microphones.

2015-01-07_10_13_31-SPU0410LR5H.pdf_-_Adobe_Reader.png Read More → "A Microphone for Gestures and Canines"