One of the immense challenges of aggressive-node design is coping with all of the variations both in the the silicon, given processing variability, and in the operating conditions. The approach has been to find ways to model the variation and create a design that is robust under all the various combinations. Not easy, since each chip comes out of the fab slightly different from its siblings.
And if you want to operate the chip over a wider range, you’ve just made the problem harder. In particular, for a circuit that will operate under a wide … Read More → "Speed Sensors in Chips"