Tabula Releases 100G Ethernet Packet Parser Reference Design Kit
SANTA CLARA, Calif., June 3, 2013 – Tabula Inc., advancing high-performance programmable logic solutions for network infrastructure systems, today announced the availability of the latest addition to its suite of high-performance packet processing solutions: the 100G Ethernet Packet Parser Reference Design Kit. This latest kit is based on its new ABAX2P1 3PLD and supported by its Stylus revision 2.6.2 compiler.
The new 100 GbE packet parser represents a novel approach to this class of network functions, delivering a unique combination of programmability and low latency currently not achievable on a programmable device. It provides support for multiple L2 accesses and trunk … Read More → "Tabula Releases 100G Ethernet Packet Parser Reference Design Kit"