Articles – Page 45

RISC-V Foundation’s Chairman says: “All Your Cores Are Belong to Us”

January 23, 2023

When RISC-V International’s chairman of the board Krste Asanović took the stage to report on the state of the RISC-V union at last month’s RISC-V Summit, he mouthed the phrase that’s always said by the president of the United States when reporting the country’s state of the union: “The state of the union is strong.” Later in his talk, Asanović said the same thing, but in a much more assertive way: “All your cores are belong to us.” … Read More →

Mysteries of the Ancients: Binary Coded Decimal (BCD)

by Max Maxfield

January 19, 2023

I love learning how logic designers of the past solved tricky problems with innovative solutions. The more I delve into this sort of thing, the more I say to myself, “Wow! I would never have thought of that!” A great example is binary coded decimal (BCD) because there’s a lot more to this topic than one might, at first, suppose.

In fact, may I make so bold as to say that, even if you’re a digital logic guru boasting a size-16 brain with go-faster stripes on the sides, … Read More → "Mysteries of the Ancients: Binary Coded Decimal (BCD)"

Intel Introduces Two Monolithic Agilex FPGA and SoC Families, Part 2: Sundance Mesa is now the Agilex 5 E-Series

by Steven Leibson

January 16, 2023

Last September, I published an article on EEJournal.com that described two new Intel Agilex FPGA and SoC device families, the Agilex 5 D-series and an as-yet-unnamed series formerly known as “Sundance Mesa,” introduced at last year’s Intel Innovation. (See “Intel Introduces Two Monolithic Agilex FPGA and SoC Families, Part 1.”) As discussed in that previous article, the two new FPGA/SoC families share many characteristics starting with their monolithic construction. I expected to follow that … Read More → "Intel Introduces Two Monolithic Agilex FPGA and SoC Families, Part 2: Sundance Mesa is now the Agilex 5 E-Series"

DeGirum Has the Best Edge AI Story Ever!

by Max Maxfield

January 12, 2023

I sometimes feel like I’m listening to a broken record when a company calls to tell me about the wonders of their new artificial intelligence (AI) processor. I try to say “Ooh” and “Aah” in all the right places, but oftentimes my heart isn’t really in it. Every now and then, however, I do get to hear something that makes me sit up in my seat and exclaim, “WHAT? O-M-G!”

I honestly believe that “WHAT? O-M-G!” is what you are going to say upon reading this column, but … Read More → "DeGirum Has the Best Edge AI Story Ever!"

Is Omnitron Poised to Disrupt the MEMS Industry?

by Max Maxfield

January 10, 2023

Rarely does a day go by without my taking a few moments to reflect on how wonderful I am. I’m not talking about my outrageously good looks or my internationally commented-on sense of style (although I’m not discounting these, either), but rather the fact that I—and you, if we’re being honest—are biological marvels.

Take our long-range visual sensing capability and consider what happens when we are travelling at speed in a car bouncing along a bumpy road, for example. The combination of our biological optical … Read More → "Is Omnitron Poised to Disrupt the MEMS Industry?"

MIPS Rolls Out Its First RISC-V Processor Core – It’s a Big ‘Un

by Steven Leibson

January 9, 2023

Even though the company had telegraphed its big move, MIPS’s adoption of the RISC-V ISA for its future processor cores hit me like a ton of bricks. MIPS is one of the heroes of the early RISC revolution, and the company has gone through a lot of ups and downs. Big ups. Big downs. Jim Turley discussed the MIPS announcement about joining the RISC-V gang last year. (See “Wait, What? MIPS Becomes RISC-V.”) Last … Read More → "MIPS Rolls Out Its First RISC-V Processor Core – It’s a Big ‘Un"

Developing the World’s First Commercially Available RF Device with an Open-Source Chip

by Max Maxfield

January 5, 2023

Good Grief! I can’t believe it’s 2023. I’m not ready. I haven’t got a speech prepared and I don’t have a thing to wear. I hope you had a wonderful holiday break with family and friends. For myself, I was originally hoping to take a 4-day weekend around Christmas Day followed by a repeat performance around New Year’s Eve.

Unfortunately, the former was not to be (too much work and not enough time—sad face). Happily, the latter did come to pass (happy face), but … Read More → "Developing the World’s First Commercially Available RF Device with an Open-Source Chip"

Does 2+2=4? Microchip announces PolarFire 2; You Do the Math

by Steven Leibson

January 4, 2023

Microchip previewed its PolarFire 2 mid-range SoC FPGA family at the RISC-V Summit last month in two presentations including a keynote given by Bruce Weyer, the company’s Corporate VP for FPGAs. Although the company provided very few product details, it dropped many hints. So many hints, in fact, that I can give you the information I’ve collected based on these hints, tell you what I think, and let you come to your own conclusions. I’ll give you the “2”s and let you check my math, but then you’ll need to add the “2”s … Read More → "Does 2+2=4? Microchip announces PolarFire 2; You Do the Math"

A History of Early Microcontrollers, Part 9: The General Instruments PIC1650

by Steven Leibson

January 2, 2023

I almost did not write this chapter in the ongoing saga of early microcontroller history. That’s not because the PIC1650 microcontroller isn’t important, just that it was not very important in its first incarnation. General Instrument Microelectronics (GI) envisioned the PIC1650 microcontroller as a peripheral chip for its 16-bit CP1600 microprocessor. In fact, “PIC” originally stood for “peripheral interface chip,” but the company eventually changed that meaning to “programmable intelligent computer.” Neither the CP1600 microprocessor nor the PIC1650 microcontroller made much impact on the industry during the 1970s. However, GI went through a couple … Read More → "A History of Early Microcontrollers, Part 9: The General Instruments PIC1650"

Introducing SafeConnect Connectivity and Glitch Sign-Off from Real Intent

by Max Maxfield

December 29, 2022

Sometimes I cast my mind back longingly to my early days as a design engineer when things were so much simpler than they are now. When I was working on my first ASIC, there was no thought of using functional blocks of intellectual property (IP) from third-party vendors because there were no such things as functional blocks of IP from third-party vendors.

Similarly, we didn’t talk in terms of things like “connectivity fabric” because all we had was wires that connected our logic gates and registers together.

< … Read More →