Articles – Page 136

October 18, 2017

“Baseball is ninety percent mental. The other half is physical.” – Yogi Berra

I was a professional photographer’s model, briefly. Very briefly. And unintentionally. And by that, I mean the photographer was professional. I wasn’t. But he needed a warm body to populate a carefully staged and well-lighted shot for some new product catalog, and he decided that having someone sit at a desk made the shot more believable. My modeling career lasted one shutter click.

My takeaway from the whole experience was that photography … Read More → "Everything Is Harder Than It Looks"

Raising the eFPGA Bar

Achronix Introduces Custom Blocks

by Kevin Morris

October 17, 2017

The recent explosion of FPGA-based compute acceleration has created an enormous new market opportunity for programmable logic. With demanding new applications such as neural networks on the rise, specialized hardware is required for offloading computation loads for newer applications – both in data centers and in edge devices and systems. Traditional FPGA companies like Xilinx and Intel/Altera are making enormous pushes to capture this rapidly emerging market.

Traditionally, FPGAs have been relegated to mostly low-volume and prototyping roles, with ASSPs and custom chips coming along and snatching the high volume sales as applications rolled into the mainstream. … Read More → "Raising the eFPGA Bar"

Software Parallelization Evolves

Silexica Morphs Technology and Messaging

by Bryon Moyer

October 16, 2017

At the beginning of this year, we looked at a new company that was attacking the whole issue of creating efficient multicore code that works identically to a single-core version. If you haven’t involved yourself in that, it might seem simple – but it’s anything but.

The company was – and still is – Silexica. And, like everyone else that’s tried to plow this field, they continue to learn about the … Read More → "Software Parallelization Evolves"

The Blue-Ribbon Cloud Crowd

Wind River’s Helix Device Cloud Offers First-Class Support

by Jim Turley

October 11, 2017

“I’ll go through life either first class or third, but never in second.” – Noel Coward

Goat yoga is a real thing. Parking meters are becoming “urban street kiosks.” CompuServe is still alive, although it’s down to its last dozen employees. And Wind River Systems would like to sell you a bridge.

As the world gets weirder, it’s nice to know that some things never change. Wind River – long a part of the embedded-systems world and more recently a part … Read More → "The Blue-Ribbon Cloud Crowd"

Hug a Data Scientist

Time for a Sea Change in Computing

by Kevin Morris

October 10, 2017

It’s been a long and mutually-productive relationship, but it’s time to break up.

For the five-decades-plus run of Moore’s Law, we electronics engineers have been married to software engineers. It’s been a love/hate relationship for sure, but together the two communities have achieved the single greatest accomplishment in the history of technology – the evolution of the modern computing infrastructure. During the five decades of collaboration, we have seen orders of magnitude of progress in every aspect of the global computing machine. … Read More → "Hug a Data Scientist"

The Many Flavors of SOI

Soitec Supports More Than Just FD-SOI

by Bryon Moyer

October 9, 2017

At this year’s Semicon West show, Soitec made a presentation summarizing the state of the union with respect to silicon-on-insulator (SOI) technology. We’ve looked at FD-SOI a couple of times, particularly with respect to GlobalFoundries’ implementations at 22 and 12 nm. But today we’re going to look more generically at the technology – and the fact that there are various extant flavors of SOI and that that will continue. (We’ll return to GlobalFoundries in < … Read More → "The Many Flavors of SOI"

Missing the Mark on Makers

How Should Big Technology Companies Approach Makers?

by Larra Morris

October 5, 2017

For the past few years, we at EE Journal have watched with excitement as the maker movement has continued to grow and assert itself in the engineering world and beyond. Making is establishing itself as a new educational paradigm for tomorrow’s engineers and as a new approach for entrepreneurs. We see makers driven by a relentless curiosity, using the act of making as a vehicle for immersive hands-on learning. We see makers transforming hobby projects and passions into thriving start-ups. Read More → "Missing the Mark on Makers"

Measuring PPs for Science

EEMBC’s Newest Benchmark Grade Peripheral Power

by Jim Turley

October 4, 2017

“I was a peripheral visionary. I could see the future, but only way off to the side.” – Steven Wright

Persistent processor appraisers promulgate propitious program promoting peripheral parsimony.

Translation: EEMBC has a new benchmark that measures MCU power efficiency.

Once upon a time, estimating an MCU’s power consumption was dead simple: it was printed at the bottom of the datasheet. That was before the advent of umpty-dozen different power-saving modes, when a chip’s active power wasn’t much … Read More → "Measuring PPs for Science"

RFSoCs FTW

The New Xilinx Chips You Never Knew You Needed

by Kevin Morris

October 3, 2017

Back in February, we previewed the new Xilinx Zynq UltraScale+ RFSoC. At the time, we were pretty optimistic about the potential of these devices, as they promised to deliver some very high-value integration of the analog and digital components of a 5G RF signal chain. Well, apparently, the “preview” days are over, because, this week, Xilinx is releasing the details of the new family as well as announcing shipments to tier-1 customers “developing multiple 5G end-applications, cable access remote-PHY nodes, and … Read More → "RFSoCs FTW"

Fast IoT Prototyping and Assembly

zGlue Reveals an Active, Programmable Substrate

by Bryon Moyer

October 2, 2017

For years we’ve had two possible levels of integration. Most electronic functionality was assembled at the board level, with components soldered down. If you really had some volume in mind, you could integrate the functionality onto a single chip – and the more we move into the future, the more we can integrate.

More recently, we’ve found a middle way: 2.5 D and 3D integration. 3D means stacking chips and wiring them together, either with bonding wire or with microbumps connected to through-silicon vias. 2.5D, on the other hand, involves … Read More → "Fast IoT Prototyping and Assembly"