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That’s a Lot of Candles

In case you missed the ticker-tape parade, Microchip just shipped its 10-billionth PIC microcontroller. That’s a whole lot of silicon out the door, especially considering how small those guys are.

What’s even more remarkable is that the product line just passed its 9 billionth birthday late last year, about 10 months ago. That’s more than 3 million PICs per day.

Remarkably, that doesn’t make the PIC the most popular MCU ever. That distinction probably goes to the 6805, although I can’t be sure. It so happens I have the 6-billionth 6805 ever made … Read More → "That’s a Lot of Candles"

Netlogic Integrates Families

We looked at many-core processors recently, and one of the big issues with scaling up the processor count is memory access: if all of those cores need access to the same memory, then that bandwidth becomes the bottleneck. Which makes SMP with many cores very difficult without shared distributed memory structures.

Netlogic has just announced their XLP II family, following on the heels of their XLP processors that have been around for a while. XLP devices go up to 32 CPUs; XLP II goes up … Read More → "Netlogic Integrates Families"

Yet Another Safety Standard

We’ve spent some time with hardware and software standards intended for so-called “safety-critical” applications, the poster child for which is the airplane. Adding variety to this scene, a recent release by Escatec, a Swiss manufacturer, indicated compliance with ATEX.

ATEX represents yet another peril: work that must be done in a potentially explosive environment. Think coal mine. Or, for those of you with a more pastoral bent, grain silos. It’s a … Read More → "Yet Another Safety Standard"

More Than Encyption and Decryption

The proliferation of nosy and evil people has made internet security increasingly important. I know… that sounds harsh, but it’s true… Why else would we keep hearing about data debacles? And this means that we’ve got to scramble all of our data before sending it so that someone can’t read or hijack it.

Which means encrypting and decrypting all data. And that’s compute-intensive. Which is why it’s almost always hardware-accelerated.

But there’s still effort involved in managing the security engine that does … Read More → "More Than Encyption and Decryption"

Main Event or Non-Event?

I had a nice talk with one of my favorite chip companies the other day. Two chip companies, in fact. Seems they’d developed some sort of new product and wanted to tell me about it. Okay. Sounds fun. Sign me up.

Except that the chip they described was already four years old.

Confused, I asked, “Uh, so what’s the news here? What are we announcing?”

“It’s our differentiating joint collaboration” was the answer. That set off all kinds of mental alarms. Warning: buzzword alert! Marketing hype incoming!

< … Read More → "Main Event or Non-Event?"

A Step Up

One of the challenges of TSVs is that they’re deeper than other vias and features. Drilling those babies uses deep reactive ion etching (DRIE), which we discussed in our MEMS article earlier in the year. The Bosch process, in particular, consists of a series of etch and clean steps that can leave scalloped sidewalls and other rough features that can be hard to cover properly when filling with metal.

French company Alchimer, … Read More → "A Step Up"

Safe Processing

When we recently looked at software and hardware safety standards, much of the discussion was focused on process-oriented standards like DO-254 and DO-178. But we also mentioned some other standards without going into detail. And some of those operate on the concept of “safety integrity level,” or SIL.

The origin of this concept is IEC 61508, which establishes four SILs, numbered 1-4, with 4 indicating the “safest” level. The determination of SIL appears to be … Read More → "Safe Processing"

More Accurate I/O Models

I/O models have become increasingly important as we’ve moved from dumb 5-V-swing full-rail CMOS I/Os (remember those?) to the tight, sensitive kinds of I/Os needed for serial connections and DDR memory. Along with that we’ve gone from no need for models to the need for very accurate models to ensure that signals will get where they’re going without being swamped by noise.

IBIS models have served that purpose, but they also were pretty rough and ready in their earlier incarnations, requiring manual work to create them.

Read More → "More Accurate I/O Models"

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