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Lattice Raises the Bar on Low Power AI

We are all focusing a lot of attention on neural network inference these days. There is lengthy debate about the relative merits of GPUs, high-end FPGAs, and other specialized solutions for generating the most and best inferencing per coloumb. Most of that centers around data center or high-end edge designs. But the real volume for inferencing chips will clearly be in cost-, power-, and space-constrained edge … Read More → "Lattice Raises the Bar on Low Power AI"

AI Meets AC/DC

“For those about to rock, we salute you.” – Brian Johnson

Let’s play a game! First, we’ll divide the players into two teams. The first team includes fluffy kittens, nuns and orphans, baby ducks, and Delta blues guitarists. The second team includes patent trolls, the Ebola virus, personal-liability lawyers, and Brussels sprouts.

Which team does … Read More → "AI Meets AC/DC"

EE Journal Editors’ Choices for World Maker Faire 2018

Our EE Journal Team is back from World Maker Faire 2018! Every year, we take a trip to World Maker Faire in New York City to check out the hundreds of booths at the New York Hall of Science where makers come to  “show and tell” their projects. The creations on display at the Faire can range from homemade arts and crafts like needlepoint and quilting, to smart home devices … Read More → "EE Journal Editors’ Choices for World Maker Faire 2018"

Plunify Cloud-powers Xilinx

As FPGA designs have gone from manageable to humongous, the demands on design tools and design tool expertise has risen exponentially. Long gone are the days when an applications engineer could waltz into your lab, click a few magic keys on a laptop, and walk out an hour later, having helped you achieve timing closure on your problematic FPGA design. Now, FPGA tools demand massive amounts … Read More → "Plunify Cloud-powers Xilinx"

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featured blogs
Nov 19, 2018
At the Linley Fall Processor Conference recently, the keynote on the second day was by Cliff Young of Google titled Codesign in Google TPUs: Inference, Training, Performance, and Scalability . The TPU is Google's Tensor Processing Unit. It is actually a family, since, as...
Nov 16, 2018
If you aren'€™t from the packaging world, then chances are likely you might think '€œpacking'€ refers to objects being placed in to a box instead of packaging integrated circuits (IC'€™s) on a substrate. Packaging has advanced since it began, and as with many areas i...
Nov 14, 2018
  People of a certain age, who mindfully lived through the early microcomputer revolution during the first half of the 1970s, know about Bill Godbout. He was that guy who sent out crudely photocopied parts catalogs for all kinds of electronic components, sold from a Quon...
Nov 13, 2018
Podcast Interview with the authors of The Hitchhikers Guide to PCB Design eBook by Mike Beutow with PCB Chat....
chalk talks
Scaling Up Vision and AI DSP Performance  For high-performance, low-power processing of AI and machine vision algorithms, latency can be critical. In this episode of Chalk Talk, Amelia Dalton chats with Pulin Desai from Cadence Design Systems about the using the new Vision Q6 processor core for embedded vision and AI applications. Click here for more information about Vision DSPs for … Read More → "Scaling Up Vision and AI DSP Performance"
Deep Learning with MATLAB   Many engineers want to take advantage of deep learning in their applications, but don’t have the AI background needed to develop the models. MathWorks is out to change all that. In this episode of Chalk Talk, Amelia Dalton chats with Girish Venkataramani from the MathWorks about using MATLAB to build deep learning applications. … Read More → "Deep Learning with MATLAB"
Scaling Embedded Deep Learning Inference Performance with Dedicated Neural Network DSP   Neural networks are taking over a broad range of exciting applications these days. But, the amount of computation required for neural network inferencing can be daunting. In this episode of Chalk Talk, Amelia Dalton chats with Pulin Desai of Cadence Design Systems about some new processor IP designed specifically for neural network inferencing. … Read More → "Scaling Embedded Deep Learning Inference Performance with Dedicated Neural Network DSP"
Industrial IoT – Smart FactoryIndustrial Internet of Things (IIoT) has a set of challenging requirements for designers. In this episode of Chalk Talk, Amelia Dalton chats with Dan Isaacs of Xilinx about meeting the security, performance, and flexibility demands of IIoT. Click here for more information about Industrial IoT Solutions powered by Xilinx.
Enabling Embedded VisionEmbedded Vision is one of today's most challenging applications. We need incredible processing power, lightning-fast latency, and very low energy consumption. In this episode of Chalk Talk, Amelia Dalton chats with Aaron Behman of Xilinx about the exciting world of embedded vision.
Molex Embedded Vision – Mouser and MolexWhen designing advanced applications such as embedded vision, connectors are one of the last things on most engineers’ minds, But the selection of the correct connectors for the job can be a make-or-break decision in the success of your product. In this episode of Chalk Talk, Amelia Dalton chats with Tony Ciapetta and Chris Slinkman … Read More → "Molex Embedded Vision – Mouser and Molex"