Articles – Page 200

March 18, 2014

They say timing is everything, and when designing digital electronics, “they” are absolutely correct. Unless we can get the timing right on every path in our project, we’re going nowhere fast. Timing closure runs the gamut of our engineering tasks – from the inside of our FPGAs through our boards and out into the world.

With the proliferation of high-speed interfaces into common standards like DDR, PCI and others, even “normal” PCB design can involve complex timing issues, and resolving all of them at once can be a bit like squeezing a balloon. … Read More → "Board Revolution"

Signing Off on Standards

Do Standards Always Make Sense?

by Bryon Moyer

March 17, 2014

Not long ago, we took a look at the issue of RTL sign-off. Within that discussion was the consideration that this might go for standardization with a body like Accellera or Si2. The issue was broached by Atrenta, but it’s also a topic that Real Intent has been paying attention to, and I had a follow-on discussion with them (one outcome of which was their response to the article).

< … Read More →

Accelerating Innovation in Cloud & Mobile Computing

Part 1

by Dick Selwood

March 13, 2014

The 1980s witnessed a “golden age” of the computer. While the commercially successful x86 architecture continued to evolve at the microarchitecture level, completely new architectures and instruction sets innovated rapidly and set the stage for intense competition. RISC concepts were refined and expanded in the MIPS, Sparc, Power, PA-RISC and Alpha (to name a few) architectures with great success.

In short, there was a lot of Darwinian action taking place. Interesting in retrospect, the vast majority of these architectures focused on workstation CPUs: by and large, the architectures were optimized for compute horsepower with a focus on … Read More → "Accelerating Innovation in Cloud & Mobile Computing"

Building the Internet of Things

What It Is Can Be Defined By Who You Are

by Dick Selwood

March 12, 2014

Q: What is the Internet of things, Mr Salesman?

A: Whatever matches my product range.

Perhaps that is a little jaundiced, but after three days in the circus that is embedded world, fighting though the aisles with nearly 27,000 visitors and on Thursday over 1000 students, one can easily become jaundiced. It is possible to forgive those who are strolling so that they can see everything, almost possible to forgive those who also drag along bags on wheels that are big enough to smuggle out a body, but the ultimate hate is reserved for those dragging such … Read More → "Building the Internet of Things"

The End of ASSP

Or Time for New Terms?

by Kevin Morris

March 11, 2014

FPGAs have their sights set on ASICs. This is nothing new. FPGA companies have actually been hell-bent on “ASIC replacement” for the past three decades. With every new generation of FPGA technology, it seems the claim is the same: “This time, we have a true ASIC replacement.”

They’ve cried “wolf” so many times, we have all forgotten what a real wolf even looks like.

And, we have also collectively forgotten what an “ASIC” is. The term, of course, is an acronym for “Application Specific Integrated Circuit.” It hails from an era when there were … Read More → "The End of ASSP"

Guaranteeing It

SiTime Goes for a Lifetime Warranty

by Bryon Moyer

March 10, 2014

There’s nothing quite like a lifetime warranty to quell concerns about product reliability. Granted, there are weasely ways in which some folks define “life” – life of a system, life of the owner, life of the original owner – but in the end, it’s usually a good thing. (I suppose defining it as the life of the product itself would be particularly weasely – “We guarantee it will continue to work until it stops working.”)

But let’s set weasels aside, because for the most part, this is not a weasely matter. A lifetime warranty is a tool … Read More → "Guaranteeing It"

A Flexible Test Strategy for 3D ICs

by Amelia Dalton

March 6, 2014

The semiconductor industry is ramping up for the wider adoption of 3D ICs, which promise better performance, reduced power, and improved yield. While some aspects of true 3D ICs are still evolving, solutions for testing 3D ICs are ready today. The test strategy for 3D ICs has two goals: improving the pre-packaged test quality and establishing new tests between the stacked dice. We describe a test strategy for 3D ICs based on a plug-and-play architecture that allows die, stack, and partial stack-level tests to use the same test interface, and to retarget die-level tests directly to the selected die … Read More → "A Flexible Test Strategy for 3D ICs"

Saas: Software as Sadism

SNL’s “Weekend Update” Has Nothing on the Software Industry

by Jim Turley

March 5, 2014

Programmers, call off your drug pushers.

I know, I know… you think you’re helping. But really, you’re not. You think you’ve got my best interests at heart. You don’t. Your marketing people have convinced you that you’re “providing a service” to your customers. That you’re “ensuring quality.” Here’s where you can stick your quality, fellah.

I’m talking, of course, about automatic forced updates to my software. That’s right, I said “my software.” Not “your software,” and not “the software you created.” Once I lay my money … Read More → "Saas: Software as Sadism"

Aye Calypto

Could the Little ESL Company be the Next Synopsys?

by Kevin Morris

March 4, 2014

Back in the 1980s, chips were designed with schematics. There was a comprehensive design tool flow to support schematic-based methodology, and the world had three big EDA companies – Daisy, Mentor, and Valid – whom most folks simply referred to as “DMV”. Those three companies thrived on the tools that defined that schematic-based flow – schematic capture, gate-level simulation, timing analysis, place-and-route, and design-rule checking. Life was good, the world was stable, and folks made some decent chips.

Unfortunately, Moore’s Law kept going. Designs got bigger and schematics got unwieldy. We needed a new thing, … Read More → "Aye Calypto"

Optimizing the Energy Harvest

Every Little Improvement Counts

by Bryon Moyer

March 3, 2014

I’ve always found ISSCC to be a useful exercise. If nothing else, it puts me in my place if I ever start thinking I know a lot. ISSCC reminds you how little you know compared to the hordes surrounding you. It’s an exercise involving me desperately trying to keep the tip of my nose above water while the presenters all around me make waves.

The available topics vary widely, with some remaining consistent over the years and others coming and going. Energy Harvesting now has its own session, and I spent some time there experimenting … Read More → "Optimizing the Energy Harvest"