The MEMS and Sensors Industry Group (MSIG) held their annual executive congress a couple of months ago. That would mean it’s time for Alissa Fitzgerald, principal at AMFitzgerald, to present what’s happening deep in the MEMS research space.
I’m also bringing in two other sources for this story – Vesper and VTT, since one of the new-technology themes relates to piezoelectric materials. So we’ll start with that and then move through the others.
As a reminder, each of these technology stories can be measured on a scale that attempts to quantify a “technology readiness level,” or TRL. We saw this a couple of years ago as well; values run from 1 to 9. We’ll be looking at stuff in the TRL 1-4 range, where these levels mean:
• TRL 1-2 is basic technology research
• TRL 2-4 is research to prove feasibility
• TRL 3-5 is technology development.
Take Another Little Piezo My Heart Now Baby
We’ve leveraged the piezoelectric effect for a long time, since long before MEMS was even a thing. MEMS sensors and actuators have typically followed one of two paths: either electrostatic elements, where applied fields make things move, or piezoelectric, where an applied voltage causes dimensional change in a material. In general, electrostatic has dominated – and continues to.
But there’s a change on the horizon: piezoelectric designs are starting to edge out electrostatic, at least in the early research stages. And this involves two branches: new applications of well-known piezo materials and research into new piezo materials.
VTT showed replacement of electrostatics using piezo-over-silicon-over-a-cavity. This involves a starting “cavity SOI” (CSOI) wafer – a wafer that has cavities built into it as a starting place. The SOI wafer has the cavities etched before the final silicon layer is bonded over it. You might think of the finished wafer as silicon bubble-wrap: you could go in with your picothumbs and pop all the little cavities. (It’s a great stress reducer.)
Of course, you can’t have a generic CSOI wafer – the size and position of the cavities is application-dependent. So there’s a cost and wafer-procurement burden that are higher than you might otherwise have for a straight generic wafer (bulk or SOI).
Given a CSOI wafer, then, you have these silicon layers with nothing underneath in places. You put a piezo thin film on top of that, and you can now stimulate out-of-plane movement in the silicon layer – bending (cantilever) and “piston” (bridge); you can have lateral movement; and you can build structures with in-plane bending or translation via a spring-actuator chain.
Ms. Fitzgerald notes some new applications for audio. We’ve seen piezo used for microphones before, with Vesper making that move. But now we might see the reverse: micro-speakers with tweeters and – yes – woofers. It may be hard to push enough air around to get a strong oontz bass going that will fill deep playa, but, for headphones, where a tiny bit of air moves, it’s doable. Meanwhile, magnetometers and transformers are other examples of upcoming applications.
Finally, film bulk acoustic resonance (FBAR) and surface acoustic wave (SAW) devices are moving beyond their most common applications, which use the resonances to filter signals. The resonant frequencies move with temperature, so this makes for a temperature sensor with ppm-level resolution. A device like this can be interrogated much like an RFID chip is, using the signal energy to stimulate resonance in the piezo material and then sending a message back for battery-less operation.
Adding a functionalized layer above the piezo film (meaning that it’s some material set up to sense or capture a specific molecule or class of molecules) makes for a high-performance gas sensor that can work in harsh environments.
From a materials standpoint, Ms. Fitzgerald notes that AlN and PZT are becoming mainstream materials, although PZT isn’t CMOS-compatible. Moving forward, she notes LiNbO3, electro-active polymers, and Ge-doped AlN as being under investigation. VTT and Vesper, meanwhile, are working with scandium as ScAlN. This film is said to have twice the piezoelectric effect of plain AlN.
Things that Aren’t Piezo
Moving into other territory, power is obviously a thing for so many upcoming designs. And we’re moving into an era with the expectation that certain sensors will be on all the time. That creates a power challenge.
Yes, you can use wake-up circuitry to put most of a chip to sleep when it’s idle. But there’s still that little piece that has to be awake so that it can wake the rest of the chip when needed. So it’s particularly important to keep that wake-up circuit at an extremely low level.
So, how about zero power? In one example, there’s a mechanical element that bends when it receives a targeted frequency. This involves plasmonics, optical resonances within metamaterials. If such mechanical detectors can serve as the wake-up, then they really need no (or almost no) power to remain vigilant.
There will, of course, be circuits necessary for analyzing signals and doing work, and they’ll need power. But they should be active only when told to wake up.
In the medical arena, DNA analysis has been performed largely using an optical setup. Now efforts are underway to do CMOS-based electrical DNA analysis. Other applications include ion concentrations in living tissue.
These applications involve mature CMOS with the addition of new thin films and functionalizing materials. Clearly those materials will have to play nicely with the normal materials in a CMOS fab.
Finally, Ms. Fitzgerald devoted a fair bit of attention to an emerging substrate material: paper. We looked at paper a few years back in the context of an energy harvester, but this is more fundamental. It’s the next obvious step after plastic for low-cost, flexible circuits.
Silicon has been our “cheap” go-to material for so many years now. And yet it’s quite expensive as compared to paper. Ms. Fitzgerald shows sapphire as the most expensive basic substrate, followed by silicon, glass, and then paper/plastic. Silicon is still the go-to if you need really accurate dimensions or actual semiconducting, but, for other apps, paper could play a role. And, it turns out, funding for silicon is decreasing, so if you’re looking for the research bucks, paper is a better lead.
Cost benefits come not only from the material itself, but also from the obvious fact that you can do roll-to-roll manufacturing – quick and easy, with no required cleanroom. Target applications include sensors for temperature, humidity, pressure, and selective gasses along with point-of-care diagnostics.
Functionalizing materials can act as indicators for the presence of various biological chemicals indicating the presence of pathogens or food spoilage. Color changes seem to be a common way of signaling results. If the detection mechanism involves a redox reaction, it might even be doable without a battery.
These paper (and new plastic) substrates are likely to hit the scene in the 2030s, while the 2020s will see the results of the new wave of piezo materials.
Silicon Stagnation: How Emerging Technologies and Non-Traditional Materials Are Changing the Future of MEMS (Fish Fry Podcast with Alissa Fitzgerald)