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QuickLogic Goes Full SoC for Sensors

QuickLogic has been focusing hard on sensor fusion for a while, and we have looked at their ArcticLink solution in the past. The first versions consisted of a combination of hard logic, dedicated microcode processor, and FPGA fabric. And the focus was on low power.

Apparently this has done well enough to make them double down on the investment. But their new SoC is different enough that they gave it a new name. While the old devices were called ArcticLink, they’ve now … Read More → "QuickLogic Goes Full SoC for Sensors"

Cadence Refreshes Synthesis and Formal

Cadence has announced a couple of major upgrades over the last month or two. They’re largely unrelated to each other – one is synthesis, the other formal verification – so we’ll take them one at a time.

A New Genus Species

First, synthesis: they announced a new synthesis engine called Genus. Another in a recent line of new products ending in “-us.” (Upcoming motto: “One of -us! One of –us!”)

There are a couple specific areas of focus for the new tool. … Read More → "Cadence Refreshes Synthesis and Formal"

Goodbye Robert Dewar, Gary Smith

 

In the last few days we have heard of the death of two major players.

The first is Robert Dewar, one of the towering figures of software in every sense of the word. As well as being an outstanding computer scientist, being involved in language design, and compiler design – particularly the GNAT compiler for ADA, he was also a businessman, founding ADACore, and an expert on the way copyright and patents affected software. He was a great evangelist for FLOSS – freely licensed open source software. I wrote about his views five years … Read More → "Goodbye Robert Dewar, Gary Smith"

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