editor's blog
Subscribe Now

Goodbye Robert Dewar, Gary Smith

 

In the last few days we have heard of the death of two major players.

The first is Robert Dewar, one of the towering figures of software in every sense of the word. As well as being an outstanding computer scientist, being involved in language design, and compiler design – particularly the GNAT compiler for ADA, he was also a businessman, founding ADACore, and an expert on the way copyright and patents affected software. He was a great evangelist for FLOSS – freely licensed open source software. I wrote about his views five years ago,  License to bill and can still remember the hour long phone call as though it were yesterday.

The second is Gary Smith, a fount of knowledge on EDA.  After Dataquest, where he was Managing Vice President and Chief Analyst of the Electronic Design Automation Service, Design & Engineering Cluster, pulled out of examining EDA, he started Gary Smith EDA as a consulting and analysis company, and built it up to become the first point of call for data and trends about EDA and its changes. An open and friendly person, I remember one DAC in San Diego where he spent a long taxi ride reminiscing about being in the Navy at the time of Viet Nam.

The world is now a poorer and emptier place.

Leave a Reply

featured blogs
Jan 21, 2022
Here are a few teasers for what you'll find in this week's round-up of CFD news and notes. How AI can be trained to identify more objects than are in its learning dataset. Will GPUs really... [[ Click on the title to access the full blog on the Cadence Community si...
Jan 20, 2022
High performance computing continues to expand & evolve; our team shares their 2022 HPC predictions including new HPC applications and processor architectures. The post The Future of High-Performance Computing (HPC): Key Predictions for 2022 appeared first on From Silico...
Jan 20, 2022
As Josh Wardle famously said about his creation: "It's not trying to do anything shady with your data or your eyeballs ... It's just a game that's fun.'...

featured video

Synopsys & Samtec: Successful 112G PAM-4 System Interoperability

Sponsored by Synopsys

This Supercomputing Conference demo shows a seamless interoperability between Synopsys' DesignWare 112G Ethernet PHY IP and Samtec's NovaRay IO and cable assembly. The demo shows excellent performance, BER at 1e-08 and total insertion loss of 37dB. Synopsys and Samtec are enabling the industry with a complete 112G PAM-4 system, which is essential for high-performance computing.

Click here for more information about DesignWare Ethernet IP Solutions

featured paper

Tackling verification challenges for PCIe® 5.0

Sponsored by Anritsu

PCIe 5.0 works at 32 GT/s data rate per lane and offers many new features, including support for an alternate protocol, precoding to prevent contiguous burst errors, and link equalization flow enhancements. While these features offer several advantages, they also pose additional challenges for verification engineers. This paper discusses the PCIe 5.0 features and their verification challenges. It also describes a case study on how to address these challenges using a strong verification IP solution.

Download White Paper

featured chalk talk

Current Sense Amplifiers: What Are They Good For?

Sponsored by Mouser Electronics and Analog Devices

Not sure what current sense amplifiers are and why you would need them? In this episode of Chalk Talk, Amelia Dalton chats with Seema Venkatesh from Analog Devices about the what, why, and how of current sense amplifiers. They take a closer look at why these high precision current sense amplifiers can be a critical addition to your system and how the MAX40080 current sense amplifiers can solve a variety of design challenges in your next design. 

Click here for more information about Maxim Integrated MAX40080 Current-Sense Amplifiers