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A New 3D IC Manager

When Imec and Atrenta recently announced a design flow for planning and routing signals between different stacked ICs, I thought, “Wait, I’ve seen this before, with a different name.” I wrote about Javelin’s role in this process a couple years ago. And it occurred to me that Javelin had been pretty quiet, and maybe I’d missed an acquisition or something.

So I checked the website – at first glance, everything seems in order. Then I … Read More → "A New 3D IC Manager"

Allocating Spectrum

A couple years ago, in an article about clock-generated noise, we talked about Teklatech’s power-shaping feature, which, at the time, was designed to smooth out the noise spectrum by making as few clock edges coincident as possible. Well, they’ve just released a new version that provides more control over the spectrum: you can design in what you want.

In conjunction with new multi-mode, multi-corner (MMMC) support, you can actually optimize different modes for different spectra concurrently by focusing in on the key noisy … Read More → "Allocating Spectrum"

Layering On

A long time ago we took a look at MRAM technology, and Crocus was one of the companies in play. Well, it’s been quiet since then. Lots of exotic memory ideas come in with a bang and quietly exit stage left at some point. Was MRAM going to be one of them?

Well, apparently not. At least not until Crocus finds a way to burn through a new $300M round of funding. For those of you struggling to get a measly $5M eleemosynary handout for … Read More → "Layering On"

Heretical Lead

Much of the motivation for Verdant’s solderless Occam process comes from the poorer reliability of solder these days. Solder has always been something of a weak spot for reliability: the phrase “cold solder joint” is practically a household word (at least for handy households). But why are things worse now?

Simple answer: we’ve removed the lead from solder. Now it doesn’t flow as well, it’s more brittle and therefore subject to more cracking, … Read More → "Heretical Lead"

The Bottom of the Pyramid

My descent (in a good way) into the world of PWB technology began with a presentation at isQED by Joe Fjelstad on the needs of the “rest” of the world when it comes to electronics. I know, it probably feels like “all Joe all the time” today, but he has some interesting ideas – whether you agree with them or not (and speak up below letting us know whether you do or don’t agree, and why).

Here& … Read More → "The Bottom of the Pyramid"

Take it Outside

As flexible as FPGAs are, you would think that you could stuff debug logic in there to probe around the internals and figure out what’s going on when you’ve got a problem.

And, if you’ve been paying attention, you’d say, “Yeah, Altera’s SignalTap and Xilinx’s ChipScope have been doing that for years.”

Well, Springsoft has just announced a ProbeLink product that sounds remarkably similar. What’s different?

The primary low-level differences are the following:

–  & … Read More → "Take it Outside"

Quicker LTE Validation

Each new communications protocol adds to the complexity of its predecessor, and the 3GPP-LTE cellular standard is no exception. According to Synopsys, there are more than a thousand tests specified in the standard to ensure compliance.

And it’s actually twice that bad: before you cut a chip, you need to verify the design against those tests. Then, when the chip comes out, you need to verify the actual silicon against the same tests.

For this reason, Synopsys – maker of pre-silicon design tools – and Rhode & Schwarz – maker of post-silicon, real, … Read More → "Quicker LTE Validation"

Stop Repeating Yourself

You may recall a while back – actually, a good while back – we looked at parasitic extraction tools and contrasted the field solver approach with Silicon Frontline’s random-walk approach. Reprised really briefly, with the random walk approach, rather than dividing the entire structure up into chunks and solving the whole thing, you follow lots of random paths through dielectric until you hit metal, and, statistically, you end up with the precision needed to determine the parasitics in all three dimensions.

As with all such … Read More → "Stop Repeating Yourself"

Is There an App for That?

Cadence just announced that it’s adding a web portal facility to its OrCAD Capture tool, and they’re enabling two different capabilities with this. The first is obvious: allowing easier access to relevant information from the OrCAD ecosystem.

But more interesting is the ability to buy apps. Now… presumably this is different from phone apps stores, where the strength – hundreds of thousands of apps – is also the weakness (why having to choose between 100 different random indistinguishable variants of the same function is a good thing is unclear to me).

Read More → "Is There an App for That?"

Coming to a Screen Near You?

Just over a year ago, we took a look at quantum dots, at least in the incarnation that Nanosys was giving them in smaller LCDs. Well, they’ve just announced a new process of applying to the dots to films so that they can be used to form larger screens – arbitrarily large, including TVs. They call the result Quantum Dot Enhancement Film (QDEF).

According to them, your colorful screen isn’t showing you nearly what it could be. By a … Read More → "Coming to a Screen Near You?"

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