As flexible as FPGAs are, you would think that you could stuff debug logic in there to probe around the internals and figure out what’s going on when you’ve got a problem.

And, if you’ve been paying attention, you’d say, “Yeah, Altera’s SignalTap and Xilinx’s ChipScope have been doing that for years.”

Well, Springsoft has just announced a ProbeLink product that sounds remarkably similar. What’s different?

The primary low-level differences are the following:

–          The trace data is stored off-chip on their board. This means it doesn’t use up on-chip memory to store traces, and you can store much more data.

–          The control is on their card, not inside the FPGA, also freeing up FPGA logic.

–          You can do multiple FPGAs: the SignalTap and ChipScope solutions only work on a single FPGA.

The idea is to be able to do more debug more quickly. Assuming your prototype covers more than one FPGA, it’s really slow to have to recompile the whole design for each different debug test you want to do. ProbeLink provides access to thousands of signals with no recompiles.

One of the ways it does this is by using a 100-MHz sampling clock (as long as the prototype system clock is less than 50 MHz) and does time-domain-multiplexing of signals on a sixteen-pin interface: the signals are actually traversing the cable at 800 MHz.

They’re also taking advantage of Xilinx’s ECO capability to let you probe different signals without completely recompiling.

Which brings up one point: at this time, they only support Xilinx. Altera support will be out soon, but the ECO thing is something they’re only “in discussion” about with Altera. So, for the time being, that’s a Xilinx-specific feature.

ProbeLink is tightly integrated with Verdi for visualizing the results.

More details in their release…