industry news
Subscribe Now

Toshiba Selects Synopsys VC Formal Verification Solution

Next-generation Formal Verification Technology Uniquely Positioned for Performance and Capacity Required for Complex SoCs

MOUNTAIN VIEW, Calif., June 15, 2017 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS) today announced that Toshiba has deployed Synopsys’ VC Formal solution as their SystemVerilog Assertion (SVA) based formal verification solution. VC Formal delivers the performance and capacity necessary to achieve faster formal convergence on Toshiba’s increasingly complex designs. Toshiba leveraged VC Formal’s native integration with Synopsys’ industry-leading VCS® functional verification solution and Verdi® debug platform to achieve faster coverage closure, more effective root-cause analysis, and earlier verification closure.

“Toshiba has deployed VC Formal as a standard SVA-based formal verification solution for the development of leading-edge automotive devices and storage products,” said Kazunari Horikawa, senior manager, Design Technology Development Department, Center for Semiconductor Research & Development, Storage & Electronic Devices Solution Company at Toshiba Corporation. “Toshiba accelerated its deployment for complex SoC designs after our first adoption of VC Formal technology in 2016. The complexity of these designs requires a verification solution that delivers best-in-class performance, capacity and ease-of-use. VC Formal enabled us to meet sign off quality for our SoCs, while reducing time to market. We continue to collaborate with Synopsys for further verification technology enhancements.”

Synopsys VC Formal delivers faster property convergence through a set of unique engines and smart engine orchestration.  Its innovative high-capacity word-level data model enables formal apps to run on large SoCs, where traditional formal products fail. VC Formal natively integrates with Verdi to provide a formal debug solution that enables simulation experts to easily leverage formal technologies for faster verification closure. VC Formal delivers accelerated debug by integrating unique Verdi engines, like Temporal Flow View and Active Trace, for automated root cause analysis of formal results. VC Formal also incorporates the robust coverage engines of VCS, allowing SoC teams to easily embed formal into their existing verification environment.

“Synopsys has a long history of successful collaboration with Toshiba on the delivery of verification solutions for advanced SoCs,” said Mo Movahed, vice president of R&D in the Synopsys Verification Group. “We collaborated with Toshiba and provided a formal verification solution that integrates into their verification flow and methodology, to improve Toshiba’s overall design quality.”

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software partner for innovative companies developing the electronic products and software applications we rely on every day. As the world’s 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you’re a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.

Leave a Reply

featured blogs
May 2, 2024
I'm envisioning what one of these pieces would look like on the wall of my office. It would look awesome!...
Apr 30, 2024
Analog IC design engineers need breakthrough technologies & chip design tools to solve modern challenges; learn more from our analog design panel at SNUG 2024.The post Why Analog Design Challenges Need Breakthrough Technologies appeared first on Chip Design....

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured paper

Altera® FPGAs and SoCs with FPGA AI Suite and OpenVINO™ Toolkit Drive Embedded/Edge AI/Machine Learning Applications

Sponsored by Intel

Describes the emerging use cases of FPGA-based AI inference in edge and custom AI applications, and software and hardware solutions for edge FPGA AI.

Click here to read more

featured chalk talk

Advanced Gate Drive for Motor Control
Sponsored by Infineon
Passing EMC testing, reducing power dissipation, and mitigating supply chain issues are crucial design concerns to keep in mind when it comes to motor control applications. In this episode of Chalk Talk, Amelia Dalton and Rick Browarski from Infineon explore the role that MOSFETs play in motor control design, the value that adaptive MOSFET control can have for motor control designs, and how Infineon can help you jump start your next motor control design.
Feb 6, 2024
12,474 views