News – Page 2325 – EEJournal

Cortus will present their range of processors for embedded systems at this year’s DesignCon with their partner Avant Technology.

January 28, 2011

January 28th 2011 – Cortus will present their range of processors for embedded systems at this year’s DesignCon2011 with their partner Avant Technology. The Cortus family of processors for embedded systems offer a complete range of solutions for embedded systems designers. Cortus have processors for designers who need a highly cost effective processor. They also have solutions for designers who need high performance multi-core systems yet have only tiny power and silicon budgets.

Avant Technology represents the entire range … Read More → "Cortus will present their range of processors for embedded systems at this year’s DesignCon with their partner Avant Technology."

Mistral announces Curtiss Wright’s First OpenVPX™ Multiprocessing DSP Engine based on Intel® Core™ i7 Processors

January 27, 2011

Bangalore, Thursday, 27^th January 2011 – Mistral Solutions Pvt. Ltd., a leading technology design and systems engineering company, today announced the availability of Curtiss Wright’s CHAMP-AV8: its first rugged, high performance OpenVPX DSP engine based on the new quad-core Intel® CoreTM i7-2715QE processor.

Read More → "Mistral announces Curtiss Wright’s First OpenVPX™ Multiprocessing DSP Engine based on Intel® Core™ i7 Processors"

Molex Experts Showcase Interconnect Expertise at DesignCon 2011

January 27, 2011

LISLE, Ill. – January, 27, 2011 – Molex Incorporated will showcase its proven expertise in high-speed, high-density, and high-signal integrity interconnect technology at DesignCon 2011, February 1 – 2, Santa Clara, CA. Molex experts will participate in technical paper presentations that feature new interconnect design developments and conduct ongoing product demonstrations of the latest Molex interconnect solutions.

Technical Paper Presentations</ … Read More → "Molex Experts Showcase Interconnect Expertise at DesignCon 2011"

Jasper ActiveProp Automates Assertion-Based Verification for SoC Design

January 27, 2011

MOUNTAIN VIEW, Calif. – Jan. 27, 2011 – Jasper Design Automation today introduced ActiveProp(tm), an innovative new property synthesis tool that helps accelerate the adoption of assertion-based verification, including formal verification as well as simulation.

ActiveProp automatically generates high-level properties in industry-standard SystemVerilog Assertion (SVA) language, as well as human-readable reports, from RTL and simulation information. ActiveProp property synthesis helps expand the verification property set, increase functional coverage, and identify coverage holes, leading to higher-quality … Read More → "Jasper ActiveProp Automates Assertion-Based Verification for SoC Design"

Tanner EDA to Address Some of the Key Challenges Facing Analog Designers at DesignCon 2011

January 26, 2011

MONROVIA, California – January 25, 2011 – At DesignCon 2011, Tanner EDA, the catalyst for innovation for the design, layout and verification of analog and mixed-signal integrated circuits (ICs), will continue their focus on accelerating analog design in a panel session on process design kits (PDKs) for analog designers and in a presentation on breaking through the analog IC layout design bottleneck. DesignCon 2011 takes place from January 31^st to February 3^{… Read More → "Tanner EDA to Address Some of the Key Challenges Facing Analog Designers at DesignCon 2011"}

Synopsys’ DesignWare DDR PHY Compiler Eases Integration of Memory Interface IP

January 26, 2011

MOUNTAIN VIEW, Calif., Jan. 26, 2011 /PRNewswire/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the immediate availability of the DesignWare® DDR PHY compiler, supporting DDR2, DDR3, LPDDR and LPDDR2 SDRAMs. The DesignWare DDR PHY compiler offers designers a web-based GUI to assemble a customized, high-performance DDR PHY for their system-on-chips (SoCs). The DesignWare DDR PHY compiler evaluates more than 60 variables and allows the evaluation of unlimited ‘what-if’ scenarios. The output of the PHY compiler is a customized hard DDR PHY … Read More → "Synopsys’ DesignWare DDR PHY Compiler Eases Integration of Memory Interface IP"

Kozio Introduces Free Use of kDiagnostics for PandaBoard

January 26, 2011

Longmont, Colo., January 26, 2011 – Kozio, Inc. (www.kozio.com) the developer of Read More → "Kozio Introduces Free Use of kDiagnostics for PandaBoard"

Avnet Electronics Marketing Releases the Nano-ITX/Spartan®-6 FPGA Development Kit based on the Intel® Atom™ Processor E640

January 26, 2011

PHOENIX–(BUSINESS WIRE)– Global electronic components and embedded solutions distributor Read More → "Avnet Electronics Marketing Releases the Nano-ITX/Spartan®-6 FPGA Development Kit based on the Intel® Atom™ Processor E640"

TI expands its MSP430™ MCU Value Line with 64 devices to give 8-bit developers more options with increased memory and capacitive touch capabilities

January 26, 2011

DALLAS, TX (January 25, 2011) – Continuing its commitment to provide more low-cost options to 8-bit developers, Texas Instruments Incorporated (TI) (NYSE: TXN) today announced 64 new ultra-low-power MSP430 Value Line microcontrollers (MCUs) that offer 16-bit performance at an 8-bit price. The new MSP430G2xx2 MCUs include integrated capacitive touch IOs, allowing developers to interface directly with capacitive touch pads, eliminating the need for additional hardware and components. Additionally, the MSP430 MCU Value Line expansion provides extra package and memory options, providing developers with increased design flexibility. Supported by TI& … Read More → "TI expands its MSP430™ MCU Value Line with 64 devices to give 8-bit developers more options with increased memory and capacitive touch capabilities"

CAST adds H.264 Main Profile Video Encoder Core to Compression IP Family

January 26, 2011

January 26, 2011, Woodcliff Lake, NJ — Semiconductor intellectual property (IP) provider CAST, Inc. has expanded its suite of video and image compression IP with a new H.264 Main Profile Video Encoder core (http://www.cast-inc.com/ip-cores/video/h264-mp-e/).

The new core complements the Baseline Profile encoder CAST already offers by delivering better video compression with only a small increase in chip size. Both encoders are … Read More → "CAST adds H.264 Main Profile Video Encoder Core to Compression IP Family"