industry news
Subscribe Now

DDC-I Announces Availability of its Safety-Critical Deos RTOS for AMD’s Steppe Eagle Multicore Processor

Provides high-performance, safety-critical, DO-178-certifiable platform for Steppe Eagle-based in-flight applications up to Design Assurance Level A (DAL-A)

Phoenix, AZ. May 18, 2017. DDC-I, a leading supplier of software and professional services for mission- and safety-critical applications, today announced the availability of its Deos™ safety-critical real-time operating system and certification artifacts, up to Design Assurance Level A (DAL-A), for AMD’s G4-based Steppe Eagle multi-core processor. Deos gives avionics developers targeting Steppe Eagle processors a DO-178-certifiable platform that delivers best-in-class performance with the high level of design assurance required for in-flight applications.

“AMD Steppe Eagle processors provide a unique blend of high-performance multicore computing, graphics, and integrated I/O in a scalable low power package that makes them ideal for many avionics applications,” said Greg Rose, vice president of marketing and product management at DDC-I. “Our industry-leading safety-focused multicore support coupled with Deos cache partitioning, slack scheduling, time and space partitioning, and industry standard ARINC 653 interfaces allow avionics developers to take full advantage of the Steppe Eagle platform and achieve maximum CPU utilization while providing the highest level of safety-critical operation.”

Steppe Eagle is based on AMD’s high-performance, low-power, x86-compatible Embedded G-Series SOC platform. Available in dual and quadcore variants at speeds of up to 2.4 GHz, Steppe Eagle provides up to 2 Mbytes of L2 cache and consumes as little as 6W. Steppe Eagle processors feature enterprise class error-correction code (ECC) memory support, an integrated discrete-class GPU with DirectX 11 support, an integrated I/O controller, and a dedicated Platform Security Processor (PSP) compatible with ARM TrustZone security technology.

Deos is a safety-critical embedded RTOS that has been certified to DO-178 DAL A since 1998. Featuring deterministic real-time response, the time- and space-partitioned RTOS employs patented slack scheduling to deliver higher CPU utilization than any other certifiable safety-critical COTS RTOS. Deos is built from the ground up for safety-critical applications, and is the only certifiable time- and space-partitioned COTS RTOS that has been created using RTCA DO-178, Level A processes from the very first day of its product development. Deos provides the easiest, lowest cost path of any COTS RTOS to DO-178 Level A certification, the highest level of safety criticality.

Development support for Deos includes DDC-I’s Eclipse-based, mixed-language OpenArbor™ IDE, which features C and C++ optimizing compilers, a color-coded source editor, project management support, automated build utilities, and a symbolic debugger. Also included is a virtual target hardware development tool, QEMU (Quick EMUlator), which allows developers to develop, debug and test their code on their development host PC in advance of actual target hardware availability.

About DDC-I, Inc.

DDC-I, Inc. is a global supplier of real-time operating systems, software development tools, custom software development services, and legacy software system modernization solutions, with a primary focus on mission- and safety-critical applications. DDC-I’s customer base is an impressive “who’s who” in the commercial, military, aerospace, and safety-critical industries. DDC-I offers safety-critical real-time operating systems, compilers, integrated development environments and run-time systems for C, C++, Ada, and JOVIAL application development. For more information regarding DDC-I products, contact DDC-I at 4600 E. Shea Blvd, Phoenix, AZ 85028; phone (602) 275-7172; fax (602) 252-6054; e-mail sales@ddci.com or visit http://www.ddci.com/pr1705.

Leave a Reply

featured blogs
May 2, 2024
I'm envisioning what one of these pieces would look like on the wall of my office. It would look awesome!...
Apr 30, 2024
Analog IC design engineers need breakthrough technologies & chip design tools to solve modern challenges; learn more from our analog design panel at SNUG 2024.The post Why Analog Design Challenges Need Breakthrough Technologies appeared first on Chip Design....

featured video

MaxLinear Integrates Analog & Digital Design in One Chip with Cadence 3D Solvers

Sponsored by Cadence Design Systems

MaxLinear has the unique capability of integrating analog and digital design on the same chip. Because of this, the team developed some interesting technology in the communication space. In the optical infrastructure domain, they created the first fully integrated 5nm CMOS PAM4 DSP. All their products solve critical communication and high-frequency analysis challenges.

Learn more about how MaxLinear is using Cadence’s Clarity 3D Solver and EMX Planar 3D Solver in their design process.

featured paper

Altera® FPGAs and SoCs with FPGA AI Suite and OpenVINO™ Toolkit Drive Embedded/Edge AI/Machine Learning Applications

Sponsored by Intel

Describes the emerging use cases of FPGA-based AI inference in edge and custom AI applications, and software and hardware solutions for edge FPGA AI.

Click here to read more

featured chalk talk

Intel AI Update
Sponsored by Mouser Electronics and Intel
In this episode of Chalk Talk, Amelia Dalton and Peter Tea from Intel explore how Intel is making AI implementation easier than ever before. They examine the typical workflows involved in artificial intelligence designs, the benefits that Intel’s scalable Xeon processor brings to AI projects, and how you can take advantage of the Intel AI ecosystem to further innovation in your next design.
Oct 6, 2023
26,887 views