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Silexica Bridges the HLS Gap

The New “Computing” Comes of Age
by Kevin Morris
January 15, 2020

Today, we call it “acceleration” – the use of specialized hardware to optimize compute tasks that do not perform well on conventional von Neumann processors. We have entered an “age of acceleration” driven primarily by the explosion in AI technology. Countless startups are engaged in developing chips with alternative architectures that accelerate and parallelize various types of compute-intensive algorithms. As a result, we are living in a heterogeneous computing world with processors and accelerators working side by side on a new generation of applications. It is possible, even likely, that this proliferation of acceleration will subsume our … Read More → "Silexica Bridges the HLS Gap"

What Makes Secure Processors Different?

Rambus Offers a Separate CPU to Secure Your Normal One
by Jim Turley
January 14, 2020

“The optimist proclaims that we live in the best of all possible worlds. The pessimist fears this is true.” ― James Branch Cabell

Given the magnificent complexity of modern microprocessors, it’s inevitable that they’ll have bugs and security holes. It might even be physically impossible to create a bug-free CPU, but that’s a mathematics/physics/EDA/statistics/philosophical conundrum that’s above my paygrade. For now, we finds the bugs and we works around ’em. 

Read More → "What Makes Secure Processors Different?"

Large ASIL-D Chips

Optima Claims 1000x Faster Analysis to Make this Possible
by Bryon Moyer
January 13, 2020

The upshot: Optima claims to have accelerated functional-safety fault coverage by 1000x, making possible large ASIL-D chips.

Functional safety is the new headache on the block. Once reserved for mil/aero designs only, automobiles have now shoved it into the spotlight.  We’ve talked about it before, but much of the discussion, perhaps not always explicitly stated, had practical impact mostly for lower-ASIL designs – that is, … Read More → "Large ASIL-D Chips"

Make Your Design Audio Savvy

Aaware Enables Robust and Secure Voice Control
by Kevin Morris
January 8, 2020

Voice control and audio interfaces are popping up in a wide spectrum of applications these days, and the possibilities extend far beyond Alexa, Google, and Siri. But adding an audio interface to your design is a complex task, and design teams face serious challenges in meeting common constraints like privacy, security, noise immunity, handling multiple speakers or sound sources, and performance. Simply extracting clear voice information from a noisy environment can be a complex task involving multiple microphones and beamforming/DSP processing.

This week, at the Consumer Electronics Show (CES) … Read More → "Make Your Design Audio Savvy"

Graph-Based AI Accelerators

Blaize Debuts; Mythic Nears Launch
by Bryon Moyer
January 6, 2020

We’ve looked at a number of architectures for accelerating neural-network inference calculations before. As an example, those we saw from Hot Chips were big, beefy processing units best targeted at cloud-based inference. But, as we’ve mentioned, there is lots of energy going into the development of inference engines that would work at the edge, with more modest power and performance expectations.

And, regardless of architecture or … Read More → "Graph-Based AI Accelerators"

How to Get Rich (I Think)

Make Yourself Indispensable by Getting in the Way
by Jim Turley
January 1, 2020

“Plastics.” – Mr. McGuire, “The Graduate”

We’re kicking off the new year with valuable, never-to-be-repeated business advice. 

Silicon Valley, like Las Vegas and parts of New York, is full of people with get-rich-quick schemes. But I’ve got a foolproof plan. I want to say just one word to you. Are you listening? Infrastructure. 

Forget making must-have products or killer apps. The real path to riches in this industry is … Read More → "How to Get Rich (I Think)"

Silicon IP Security Proposal

Accellera’s IPSA Working Group Puts Forth a Flow
by Bryon Moyer
December 30, 2019

The upshot: Accellera has published a whitepaper on the topic of silicon intellectual-property security, and they’re soliciting comments.

Last summer, there were a number of security-related topics at the annual DAC conference, which we covered in August. That activity included Accellera diving into the issue of security surrounding silicon design and, in particular, risks associated with intellectual property (IP) – meaning pre-designed circuits purchased or re-used. … Read More → "Silicon IP Security Proposal"

[Electronic] Ghosts of Christmas Past and Future

by Max Maxfield
December 26, 2019

A couple of days ago, I decided that I really needed a laser distance measurer (it’s best if you don’t ask questions), so I ambled down to my local Home Depot store and picked up a Bosch BLAZE device for only $29.

This little beauty, which is only 4 x 1.3 x 0.9” (10 x 3.3 x 2.3 cm) in size, can measure and record distances up to 65 feet (20 meters) with an accuracy of +/- 0.1” (3 mm) (I’ve rounded the numbers for simplicity).

The first thing that struck me … Read More → "[Electronic] Ghosts of Christmas Past and Future"

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