Craig (not his real name) is the lead engineer on his company’s most important project. So far, Craig has been worth his weight in gold (which is about $1.6M assuming $550 per troy ounce at his current weight of 2916 troy ounces). Besides working out regularly to keep those unwanted troy ounces off, Craig keeps up with the very latest FPGA technologies so he can make solid decisions in creating his company’s new flagship electronic product.

This time, Craig chose a state-of-the-art 90nm FPGA as the centerpiece of his masterpiece. The product fit was perfect. Before this … Read More → "Go, Stop, Yield"

Achieving timing closure in today’s increasingly large and complex digital integrated circuit designs – irrespective of whether they are realized using FPGA, Structured ASIC, or even Standard Cell ASIC fabric – is becoming evermore problematic with the latest design targets running at aggressive clock speeds.

The majority of today’s designers typically code in RTL using Verilog or VHDL. Also, there is some use of C/C++/SystemC coupled with behavioral synthesis technology in certain application areas. Unfortunately, both of these approaches have specific, but different, disadvantages associated with them. As we shall see, … Read More → "Are You Designing with Too Many Significant Figures?"

I was at DATE 2006, a tradeshow in Germany. My cell phone started buzzing with calls, voicemails and e-mail. People were stopping me on the show floor – pulling me aside, whispering rapidfire questions – always small variations on a theme. “Did you hear that LSI Logic is killing RapidChip? Do you think that structured ASIC is dead? Are other structured ASIC vendors pulling out as well? Will FPGAs wipe out the structured and platform ASIC space entirely? What’s Altera doing? What about ChipX? Isn’t AMI doing structured as well? Has eASIC been acquired yet? What have … Read More → "Ask for Whom the Bell Tolls"

Abstract

Use of a generic FPGA board together with a powerful programming environment is investigated. It is demonstrated that high-performance real-time analysis is achieved at a reasonable cost. The system is simple to integrate with off-the-shelf acquisition systems such as LabVIEW. A flexible wavelet algorithm is programmed and is found to be considerably faster than the processor of the host computer. The flexibility of the processing unit makes it a promising tool for applications where ordinary desktop computers do not provide enough processing power.

Research-oriented experimental equipment must often offer high-performance … Read More → "Field Programmable Gate Arrays for Flexible and Fast Data Processing"

My twenty-three-year-old eyes couldn’t muster the maturity to disguise my frustration. He sensed their weakness. It was what he was watching for. Even as I struggled in vain to regain my composure, he moved in for the kill. “What did you say again that your company does?” My father posed the question, fully aware of the answer, waiting with the patience of the hunter who has already cornered his prey for my inevitable self-destruction.

I rolled into my own defeat with the resignation of a mortally wounded rabbit. “Gate arrays,” I … Read More → "What Do You Tell Them?"