The Big eASY
What’s bigger, faster, cheaper, and lower-power than the biggest, newest 65nm and 40nm FPGAs?
ASICs, of course.
OK, I can hear you already –
“That’s not a fair comparison.”
“You need a team of 50 experts to design a high-end ASIC.”
“By the time you factor in NRE and mask costs, ASIC costs a lot more unless your volume is in the millions.”
“ASIC has very long design cycles.”

