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The Haunting of Fab 51

An FPGA Designer's Nightmare

The wild wind whistles strange through the bright gloom of eternal daylight in the tightly-sealed semiconductor fab.  In the power-assured place where progress never pauses – where cryptically-coded wafers plod persistently through mysterious machines in the acrid vacuum of the clean room – where white-suited phantoms pass FPGAs through evil rays and deadly potions and spinning saws… something is amiss.

In the nooks and crannies of nanometer features – in the spaces between the spaces – in the places where the design rule checkers never checked, engineers never engineered, and vectors never ventured, there is a problem brewing.  It is a most subtle trouble – a fiendish flaw whose sinister scheme is carefully camouflaged in the vast microcosm of the die’s twisted traces – hidden in the heavily doped spaces – dreaming of the twisted faces of the design engineer whose fear has come to pass, whose fate is sealed at last, whose time for action has passed.

In the cold confidence of the lab, these ghoulish gremlins will never surface.  They lurk in the LUTs with far greater purpose, biding their time until the day of reckoning and doom – lying in wait for the glory of their gloom, patiently seeking their accidental Igor, the hapless catalyst, the unwitting accomplice who unknowingly trips the wire and starts the reaction – unleashing the fire.

Step, step, step, step, click, whirr, click, step… the boats move along in their monotonous rhythm, micro-controlled mechanisms meticulously metering them on down the line – their haunted cargo just biding its time – their wafers just waiting – their fate not abating. Steely-eyed inspectors hover like specters, peering through microscopes, scanning for flaws.   Balls of hot solder melt and flow, melt and flow, melt and flow.  Shining saws strip sand from the die, dicing and carving, picking and placing, moving and packing, and everything’s checked, and checked, and checked.

An ocean away, he awakes from his sleep –– a neuron of dread – some far-forgotten flaw that sticks in his head – a doubt.  He flashes a thought about something he missed, a bit not quite right that troubles his rest and ruins his night.  The months of hard work have exhausted his mind.  He struggles to find – an answer, a clue to his autumn-eve’s dream.  He lies and he thinks.

He’s labored for years on the details of design, carefully composing a silent symphony of silicon – a microscopic masterpiece of monumental proportions – a static array of unmatched kinetic capabilities.  His tables of truth are pictures of perfection, his logic cells arranged in the ideal locations – he’s tested the flow on many occasions.  He’s stared ’till he’s blind at the eye that won’t close while billions of bits scorch through rickety lines – his errors were counted, pre-emphasis mounted, and everything checked. And checked, and checked.

Yet here he now sits, awake in the night – thinking through problems, alone with his fright.  He pushes it away and fades back to sleep.  And away in the warehouse the systems are packed, the boxes are stacked, the new boards are racked, their inventories tracked – and everything’s checked, and checked, and checked. 

While dozing he dreams of runaway heat, unreachable states, improper slew rates.  He awakes with a start, then drifts back to dream.  The IOs, the buffers, his low self-esteem all conspire to assail him at once on this night.  He tries to resist it.  He puts up a fight and ticks off the lines of his mental checklist – looking in vain for problems he’s missed.  A billion transistors per die lie in wait – concealing his demons, sealing his fate – mocking his restless sleep with a cocky chuckle that he can almost hear, here, tonight.

Away on a hilltop, oblivious workers dutifully install new systems – big boxes with lightly screened logos line the landscape.  Power is applied.  Bitstreams are blasted into virgin latches – configuring logic in new and devious ways.  Data is flowing and packets are switching. Protocols chat in their own cryptic tongues, exchanging curses and compliments no human will hear.  Temperatures stabilize.  Modems train.  Error rates drop to manageable levels.  Backplanes silently scream with masses of meaningless information – all encrypted at the source.

He’s awake again now.  He’s read the reports, and everything’s well – nothing untoward.  His immaculate verilog has passed every test – his vectors were verified, his timing all checked.  Still something is nagging him, deep in his head.  It teases his conscious, unleashing his dread.  But everything’s checked, and checked and checked.

He’s walked through scenarios and computed the odds.  He knows what he’s doing.  He’s not one of those clods that punches the clock and then runs off to golf.  Design is his passion, his ambition, his life. He knows from the cosmos that neutrons are flying, and one in a trillion will find the right spot.  But he’s ready for them – the whole random lot.  He’s modeled his system and measured its soul.  He knows his machines can fend off the plot.  He’s walked through scenarios and computed the odds.  He knows what he’s doing.  He’s not one of those clods that punches the clock and then runs off to golf.  Design is his passion, his ambition, his life.

Still, away on a line card, the demon awakes.  The engineer feels it.  He smiles, but he fakes.  He feels it as sure as knows his own bed.  The problem is out there – not just in his head.  He drifts back to sleep while the haunted fab churns – far over the ocean, his demon’s fire burns – mass producing his folly, his error, his fault.   His bug stands and taunts him – mocking his name with a sound he remembers from bullies at grade school – it feels just the same.  The demon is patient.  It toys with its prey.  It feeds on his confidence, his fear, and his dread.  It might show tomorrow, next week, or someday when the engineer sleeps – all alone – in his bed.  

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