SUNNYVALE, Calif. – October 6, 2009 – MIPS Technologies, Inc. (Nasdaq: MIPS), a leading provider of industry-standard processor architectures and cores for digital consumer, home networking, wireless, communications and business applications, today announced that Altera Corporation licensed … Read More → "MIPS Technologies Licenses MIPS32® Architecture to Altera Corporation"
New device first in a family of EPC Gen-2, high-density memory transponder ICs
COLORADO SPRINGS, CO – October 6, 2009 & … Read More → "Ramtron Announces MaxArias™ RF-enabled Wireless Memory"
San Jose, CA, October 6, 2009 – Atmel® Corporation (Nasdaq: ATML) today announced the first ATA874x single-chip UHF ASK/FSK RF transmitter family targeting a broad range of proprietary wireless industrial and consumer applications such as metering, alarm … Read More → "Atmel’s AVR Microcontrollers Now Integrate RF Transmitter Functionality to Address Industrial Applications"
Q: When is a disk drive not a disk drive? A: When it becomes your next memory chip.
We’ve seen how flash memory chips are steadily replacing hard disk drives in MP3 players, laptop computers, and all sorts of embedded systems. Now, in a weird reversal of technology fortunes, disk-drive technology is moving into nonvolatile memory chips.
The perpetrator of this counter-intuitive strategy is Crocus, a French startup named after a Mediterranean flower bulb. Just as the crocus competes with the tulip in horticultural circles, Crocus competes with flash memories among technophiles. … Read More → "Spinning Heads & Busting Spooks"
Integrated PCIe FPGA Endpoint Achieves PCI-SIG Compliance for PCI Express 1.1 Single-lane Configurations
SAN JOSE, Calif., Oct. 5 /PRNewswire/ — Xilinx (NASDAQ:XLNX) today announced that its low-cost Spartan®-6 FPGA family is compliant with the PCI Express® 1.1 specification, enabling low-risk and low-cost implementation of serial connectivity solutions for consumer, automotive, wireless, and other price-sensitive or high volume markets. Spartan-6 FPGAs satisfy the cost, ease-of-use, and low power requirements of developing systems compliant with PCIe® for applications such as in-vehicle infotainment, flat-panel displays, and video surveillance.
The integrated Endpoint block for PCI Express in … Read More → "Xilinx Spartan-6 FPGAs Enable PCI Express Compliant System Design for Low-Power, Low-Cost Connectivity Applications"
AUSTIN, Texas, Oct. 5 /PRNewswire/ — Tekmos, Inc. announced today the introduction of its new TK80C186EB and TK80C188EB microprocessors designed as drop-in replacements for the discontinued Intel 80C186EB / 80C188EB microprocessors.
The TK80C186EB integrates commonly used system peripherals with the 186 CPU core to save space and reduce overall power consumption. A programmable interrupt controller supports and prioritizes 128 interrupts from internal, external, and software sources. The TK80C186EB also contains three programmable timer / counters, two serial channels, 2 parallel ports, and 10 programmable chip selects with programmable wait state generators. The TK80C186 … Read More → "Tekmos Introduces ‘Drop In Replacement’ for Intel 80C186EB and 80C188EB Microprocessors"
Integrated PCIe FPGA Endpoint Achieves PCI-SIG Compliance for PCI Express 1.1 Single-lane Configurations
SAN JOSE, Calif., Oct. 5 /PRNewswire/ — Xilinx (NASDAQ:XLNX) today announced that its … Read More → "Xilinx Spartan-6 FPGAs Enable PCI Express Compliant System Design for Low-Power, Low-Cost Connectivity Applications"
Eleventh Annual Boston Event is Part of Largest User Conference Program in EDA
MOUNTAIN VIEW, Calif., Oct. 5 /PRNewswire-FirstCall/ — Synopsys, Inc. (NASDAQ:SNPS) , a world … Read More → "Synopsys Recognizes Technical Excellence at SNUG Boston Conference"
Introduction
Altera first introduced the 180-nm CMOS-technology HardCopy® series of ASICs, with their “seamless prototyping” capabilities, in 2001. The premise behind this first-generation HardCopy ASIC product was to “harden” the look-up table (LUT) structure of the FPGA and replace the programmable switch fabric with … Read More → "WHITE PAPER – Generating Functionally Equivalent FPGAs and ASICs With a Single Set of RTL and Synthesis/Timing Constraints"
Introduction
Altera first introduced the 180-nm CMOS-technology HardCopy® series of ASICs, with their “seamless prototyping” capabilities, in 2001. The premise behind this first-generation HardCopy ASIC product was to “harden” the look-up table (LUT) structure of the FPGA and replace the programmable switch fabric with … Read More → "WHITE PAPER – Generating Functionally Equivalent FPGAs and ASICs With a Single Set of RTL and Synthesis/Timing Constraints"
