Traditionally, system designs achieve reliability through redundancy, leading to increased component count, logic size, system power, and cost. Altera’s design separation feature meets these conflicting power, size, and functionality needs while maintaining high reliability and information assurance. The use of FPGAs has grown from the glue logic interfaces of the past to the advanced information-processing systems used by core Internet routers and high-performance computing systems.

Read More → "Enabling Design Separation for High-Reliability and Information-Assurance Systems"

This paper describes key technologies that enable Stratix IV GT FPGAs to deliver the performance and capabilities necessary to support 40G/100G applications with integrated 11.3 Gbps transceivers. These include the LC-based oscillator and decision-feedback equalization (DFE) at 40 nm for ultra-low jitter FPGA transceivers. Furthermore, the transceiver architecture, including clocking and clock data recovery (CDR) technologies, are highlighted, as well as performance validation results.

The emergence of the high-definition (HD) 1080p video standard has presented some formidable design challenges for broadcast system engineers. While HD broadcasting now is established as the de facto standard for video broadcast around the world, new production equipment still must be able to handle the legacy of standard-definition (SD) and 1080i interfaces. This puts equipment manufacturers under pressure to build a cost-effective video interface solution that can handle multi-rate video.

< … Read More → "Implementing a Multirate Uncompressed Video Interface for Broadcast Applications"

Question: What do the following items have in common?

• iPhones
• Avatar 3D (James Cameron’s new movie)
• Digital SLR cameras</ … Read More → "Supporting Digital Television Trends with Next-Generation FPGAs"

FPGA architecture allows for many algorithm implementations where the sustained performance is much closer to the device’s peak performance when compared to quad-core CPUs or GPGPUs. The strong benchmarking results from FPGA accelerators will continue to improve with appropriate focus on the silicon, arithmetic, and library foundations. As even the largest FPGAs currently consume less than 30W of power, FPGA roadmaps are well below datacenter … Read More → "FPGA Coprocessing Evolution: Sustained Performance Approaches Peak Performance"

The combination of Altera’s Arria II GX family and TPACK’s 2.5-Gbps/10-Gbps Ethernet-over-SONET/SDH and 10-Gbps/20-Gbps switch/NPU solutions meet the requirements of next-generation MSPP linecards and maintain existing infrastructure. Like ASSPs, FPGAs are based on the traditional manufacturing process, either in-house or via commercial foundries, but due to their broader and more generic application, the production volume that FPGAs attain justifies investment in the latest manufacturing processes and technology.

Market trends, the need for increased productivity, and new legislation have accelerated the use of safety systems in industrial machinery. This TÜV-qualified FPGA design methodology is changing the paradigms of safety designs and will greatly reduce development effort, system complexity, and time to market. This allows FPGA users to design their own customized safety controllers and provides a significant competitive advantage over traditional microcontroller or ASIC-based designs.

Read More → "Developing Functional Safety Systems with TÜV-Qualified FPGAs"

Approximately one-third of embedded designers surveyed on the adoption and use of FPGAs for embedded applications responded that they perceived FPGAs as too expensive to use in their designs. However, a look at the total cost of ownership (TCO) at the system level (as measured by development, enhancement, replacement, and maintenance costs over the lifetime of the product) reveals that Altera FPGAs offer competitive and flexible alternatives to discrete MCU/DSP/ASSP products.

< … Read More → "Lowering The Total Cost of Ownership for Industrial Applications"