Learn how quickly and easily you can run a comprehensive memory test and uncover design and reliability issues. In this video, a memory failure is detected only in “burst” mode, while passing all other tests. A second development board passes all the tests.
… Read More → "Is Your Memory Design Correct and Reliable?"Watch this short video on Embedded Design Verification Best Practices and learn how to verify embedded designs for correctness and reliability utilizing a NEW approach employing a Verification and Test OS (VTOS™).
… Read More → "Embedded Design Verification Best Practices Short Video"It’s widely accepted that embedded programmers don’t use agile programming methodologies. Hard deadlines mean hard commitments and none of this wishy-washy, hippie-talk, “It’ll be done when it’s done” nonsense.
Which may raise two questions in your mind. Most fundamentally, what does “agile” mean? And, perhaps more critically, is this truism actually true? There was a session covering this at DesignWest (or ESC), and it’s funny how process can get in the way of progress, even for processes that purport to value progress over process.
Let’s unpack this.
Troubleshooting and quickly isolating faults is of tremendous value for reducing the time to redesign or repair failing boards. This process can cost a company millions of dollars each year. Supporting OMAP, Sitara, QorIQ, PowerQUICC and PowerPC, this paper describes how using an interpreter that allows the execution of a full test suite for verifying a design or an individual test for fault isolation can dramatically improve quality and reliability with Kozio’s Verification and Test OS (VTOS™). It describes how memory errors can be isolated to ECC (Error Control Coding), single-bit, … Read More → "Troubleshooting and Fast Fault Isolation with VTOS"
In this whitepaper the author reviews how leveraging VTOS during the prototype phase can assist engineers in overcoming the challenges design complexity exerts on product development, manufacturing, and overall time-to-market. Readers will gain insight into how they can replace today’s ad-hoc board level verification approaches with an ordered methodology that enables designers to automatically validate their own hardware designs, optimize system performance, and simplify the process of integrating new hardware with new software.
… Read More → "A Platform for Reducing Verification Time and Improving Reliability of Embedded System Hardware"Memory is fundamental to the “sanity” of an embedded system. Inadequate memory testing is posing critical challenges to designers and indirectly manifesting considerable consequences at some of the biggest names in the electronics business. Today’s embedded systems consist of multiple memory types including SDRAM, LPDDR2, DDR3, FLASH, EEPROM and more, along with multiple protocols including GPIO, PCI, SPI and I2C. This paper will review a comprehensive and flexible Verification and Test Operating System (VTOS™) solution that includes a suite of memory tests that verifies the design for correctness and production … Read More → "Memory Testing 101 – Avoid the Train Wreck"
Let’s just start by saying that this is really a big deal.
I could come up with a lot of impressive numbers and comparisons to dazzle you with the size of the project Xilinx just publicly disclosed (although it’s been one of the worst-kept secrets in the FPGA market). In fact, Xilinx offered some sound bites to us right away – like “500 man-years of engineering effort.”
But that just doesn’t even begin to capture the scope of it.
Before we dive into the details of the new Vivado Design Suite that … Read More → "Kind Of A Big Deal"
Customers have prototyped their products utilizing Microsemi FPGA & cSoCs and then quickly went to production on the same platform. This ensures design consistency and gets product to their customers on time as scheduled. Microsemi’s private label program goes a step further and provides the ability to custom mark devices with company logo’s and part numbers. Furthermore, our devices do not require an external EEPROM for boot-up configuration, thus the end product can be sold as single IC solution. This approach provides numerous levels of security including prevention of reverse … Read More → "Customer Private Label Program"
It’s a fine marketing line: pick a strong, simple message and reinforce it without smashing it into your prospect’s face. You want to direct someone’s actions without them feeling like they’re being directed.
Most conferences have a cacophony of messages. I’ve been asked many times, “What are you seeing at [name your conference here]?” and I’m sometimes stumped for an answer because I’m seeing so many different things. Of course, most conferences are put on by organizations whose stake is simply in putting on a conference, so the messages really … Read More → "I Can Has Roadmap?"
One of today’s biggest Silicon Valley gripes is the evaporation of venture capital (VC) funding for chip startups. Since the dotcom bust, consumer application-driven silicon innovation has been reduced to a relentless chase after Moore’s Law – improving power, cost and speed for incremental multimedia and wireless enhancements in a race down the consumer product generational roadmap to Inventiveness Oblivion.
With 40+ years combined founding and joining startups and working for giant chip and systems companies, the authors have seen Valley booms and “game changer” technologies come and go. Now, though, industry veterans feel Silicon Valley isn’ … Read More → "Revitalizing the Chip Startup Environment"
